| 12498886 |
Buffer allocation for reducing block transit penalty |
Kishore Kumar Muchherla, Peter Feeley, Jingde Zhu, Faliang Zhu, Akira Goda +3 more |
2025-12-16 |
|
| 12498885 |
Methods and systems for implementing stream data updates |
Sriram Natarajan, Weng-Chin Yung, Swapna Galireddy |
2025-12-16 |
|
| 12481463 |
Multiple-pass programming of memory cells using temporary parity generation |
Kishore Kumar Muchherla, Lakshmi Kalpana Vakati, Dave Scott Ebsen, Peter Feeley, Vivek Shivhare +3 more |
2025-11-25 |
|
| 12216541 |
Block failure protection for zone memory system |
— |
2025-02-04 |
|
| 12130748 |
Caching of logical-to-physical mapping information in a memory sub-system |
— |
2024-10-29 |
$30,986,000 |
| 12124380 |
Storing a logical-to-physical mapping in NAND memory |
— |
2024-10-22 |
$36,004,000 |
| 12079517 |
Buffer allocation for reducing block transit penalty |
Kishore Kumar Muchherla, Peter Feeley, Jiangli Zhu, Fangfang Zhu, Akira Goda +3 more |
2024-09-03 |
$19,072,000 |
| 12050809 |
Multi-pass data programming in a memory sub-system having multiple dies and planes |
Steven S. Williams, Mark Ish, John E. Maroney |
2024-07-30 |
$28,317,000 |
| 12051479 |
Memory block programming using defectivity information |
Kishore Kumar Muchherla, Akira Goda, Dave Scott Ebsen, Lakshmi Kalpana Vakati, Jiangli Zhu +3 more |
2024-07-30 |
$28,317,000 |
| 12045168 |
Timed data transfer between a host system and a memory sub-system |
— |
2024-07-23 |
$34,395,000 |
| 12001721 |
Multiple-pass programming of memory cells using temporary parity generation |
Kishore Kumar Muchherla, Lakshmi Kalpana Vakati, Dave Scott Ebsen, Peter Feeley, Vivek Shivhare +3 more |
2024-06-04 |
$27,497,000 |
| 11922011 |
Virtual management unit scheme for two-pass programming in a memory sub-system |
Johnny A. Lam, Samyukta Mudugal, Byron D. Harris, Daniel A. Boals |
2024-03-05 |
$17,899,000 |
| 11914471 |
Block failure protection for zone memory system |
— |
2024-02-27 |
$14,682,000 |
| 11868287 |
Just-in-time (JIT) scheduler for memory subsystems |
Johnny A. Lam, Alex J. Wesenberg, Guanying Wu, Chandra M. Guda |
2024-01-09 |
$10,439,000 |
| 11782841 |
Management of programming mode transitions to accommodate a constant size of data transfer between a host system and a memory sub-system |
James Fitzpatrick |
2023-10-10 |
$11,017,000 |
| 11782643 |
Partial execution of a write command from a host system |
Mark Ish |
2023-10-10 |
$11,017,000 |
| 11755495 |
Storing a logical-to-physical mapping in NAND memory |
— |
2023-09-12 |
$13,618,000 |
| 11734189 |
Caching of logical-to-physical mapping information in a memory sub-system |
— |
2023-08-22 |
$9,108,000 |
| 11726703 |
Extending size of memory unit |
— |
2023-08-15 |
$9,169,000 |
| 11714562 |
Journal scheme for two-pass programming memory devices |
Johnny A. Lam, Samyukta Mudugal |
2023-08-01 |
$10,878,000 |
| 11709632 |
Input/output size control between a host system and a memory sub-system |
Mark Ish |
2023-07-25 |
$13,773,000 |
| 11676679 |
Two-layer code with low parity cost for memory sub-systems |
James Fitzpatrick |
2023-06-13 |
$11,975,000 |
| 11669272 |
Predictive data transfer based on availability of media units in memory sub-systems |
Steven S. Williams, Mark Ish |
2023-06-06 |
$9,972,000 |
| 11640354 |
Logical-to-physical mapping of data groups with data locality |
Johnny A. Lam, John E. Maroney, Mark Ish |
2023-05-02 |
$32,757,000 |
| 11573742 |
Dynamic data placement for collision avoidance among concurrent write streams |
— |
2023-02-07 |
$15,619,000 |