Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
MI

Mark Ish — 78 Patents

Micron: 35 patents #558 of 6,374Top 9%
STSeagate Technology: 22 patents #243 of 4,701Top 6%
APAvago Technologies General Ip (Singapore) Pte.: 11 patents #47 of 2,004Top 3%
LSLsi: 6 patents #609 of 3,238Top 20%
ECEccs: 1 patents #4 of 6Top 70%
TMTexas Microsystems: 1 patents #5 of 11Top 50%
San Ramon, CA: #27 of 2,140 inventorsTop 2%
California: #3,628 of 386,348 inventorsTop 1%
Overall (All Time): #23,712 of 4,157,543Top 1%
78 Patents All Time
Mark Ish has been granted 78 US patents while listed as an inventor at Micron. The first was granted in 1994 and the most recent in November 2025. Mark Ish ranks #23,712 of 4,157,543 US inventors in our database (top 0.57%). Patent records list Mark Ish in San Ramon, CA, US.

Issued Patents All Time

Showing 1–25 of 78 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12468449 Apparatus with response completion pacing Ying Huang 2025-11-11
12393510 Namespace management for memory sub-systems Alexei Frolikov 2025-08-19
12230332 Suspending memory erase operations to perform higher priority memory commands Shakeel Isamohiuddin Bukhari 2025-02-18
12182447 Dynamic selection of cores for processing responses Yun Li, Scheheresade Virani, John Paul Traver, Ning Zhao 2024-12-31 $26,584,000
12079065 Caching lookup tables for block family error avoidance Shakeel Isamohiuddin Bukhari 2024-09-03 $19,072,000
12050776 Apparatus with response completion pacing Ying Huang 2024-07-30 $28,317,000
12050809 Multi-pass data programming in a memory sub-system having multiple dies and planes Sanjay Subbarao, Steven S. Williams, John E. Maroney 2024-07-30 $28,317,000
11966635 Logical unit number queues and logical unit number queue scheduling for memory devices Shakeel Isamohiuddin Bukhari 2024-04-23 $30,870,000
11960740 Implementing automatic rate control in a memory sub-system Ying Huang 2024-04-16 $24,030,000
11847065 Memory sub-system management of firmware block record and device block record Jiangang Wu, Jung Sheng Hoei, Qisong Lin, Peng Xu 2023-12-19 $18,498,000
11782643 Partial execution of a write command from a host system Sanjay Subbarao 2023-10-10 $11,017,000
11720681 Firmware execution profiling and verification Yun Li, Harini Komandur Elayavalli 2023-08-08 $8,604,000
11720289 Block family tracking for memory devices 2023-08-08 $8,604,000
11709732 Mitigating read disturb effects in memory devices Gerald L. Cadloni, James P. Crowley 2023-07-25 $13,773,000
11709632 Input/output size control between a host system and a memory sub-system Sanjay Subbarao 2023-07-25 $13,773,000
11693774 Selectively utilizing a read page cache mode in a memory subsystem Jiangang Wu, Jing Liu, Jung Sheng Hoei, Kishore Kumar Muchherla, Myoung Jun Go +2 more 2023-07-04
11675695 Namespace management for memory sub-systems Alexei Frolikov 2023-06-13 $11,975,000
11669272 Predictive data transfer based on availability of media units in memory sub-systems Sanjay Subbarao, Steven S. Williams 2023-06-06 $9,972,000
11640354 Logical-to-physical mapping of data groups with data locality Sanjay Subbarao, Johnny A. Lam, John E. Maroney 2023-05-02 $32,757,000
11630779 Hybrid storage device with three-level memory mapping Nitin Satishchandra Kabra, Jackson L. Ellis, Niranjan Anant Pol 2023-04-18 $16,085,000
11579799 Dynamic selection of cores for processing responses Yun Li, Scheheresade Virani, John Paul Traver, Ning Zhao 2023-02-14 $11,066,000
11556258 Implementing automatic rate control in a memory sub-system Ying Huang 2023-01-17 $11,545,000
11513959 Managing collisions in a non-volatile memory system with a coherency checker Horia Simionescu, Lyle E. Adams, Yongcai Xu 2022-11-29 $10,551,000
11481348 Handling operation collisions in a non-volatile memory Lyle E. Adams, Pushpa Seetamraju, Karl D. Schuh, Dan Tupy 2022-10-25 $11,361,000
11449431 Data storage device with rewritable in-place memory Timothy Canepa, David Scott Ebsen 2022-09-20 $13,544,000