Issued Patents All Time
Showing 1–25 of 35 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12260916 | Partial block handling in a non-volatile memory device | Zhongguang Xu, Nicola Ciocchini, Zhenlei Shen, Murong Lang, Ugo Russo +1 more | 2025-03-25 |
| 12183406 | Eliminating write disturb for system metadata in a memory sub-system | Tingjun Xie, Zhenming Zhou, Zhenlei Shen | 2024-12-31 |
| 12062401 | Performing block-level media management operations for block stripes in a memory device | Wei Wang, Seungjune Jeon, Yang Liu | 2024-08-13 |
| 12050777 | Adaptive scanning of memory devices with supervised learning | Li-Te Chang, Murong Lang, Vamsi Pavan Rayaprolu, Seungjune Jeon, Zhenming Zhou | 2024-07-30 |
| 12026042 | Adaptive wear leveling for endurance compensation | Seungjune Jeon, Wei Wang, Zhenming Zhou | 2024-07-02 |
| 11994945 | Managing write disturb for units of memory in a memory sub-system | Zhenming Zhou, Tingjun Xie | 2024-05-28 |
| 11989107 | Application of dynamic trim strategy in a die-protection memory sub-system | Tingjun Xie | 2024-05-21 |
| 11914510 | Layer interleaving in multi-layered memory | Mikai Chen, Zhengang Chen | 2024-02-27 |
| 11901014 | Partial block handling in a non-volatile memory device | Zhongguang Xu, Nicola Ciocchini, Zhenlei Shen, Murong Lang, Ugo Russo +1 more | 2024-02-13 |
| 11853617 | Managing write disturb based on identification of frequently-written memory units | Tingjun Xie, Zhenming Zhou | 2023-12-26 |
| 11790998 | Eliminating write disturb for system metadata in a memory sub-system | Tingjun Xie, Zhenming Zhou, Zhenlei Shen | 2023-10-17 |
| 11756604 | Managing write disturb for units of memory in a memory sub-system using a randomized refresh period | Seungjune Jeon | 2023-09-12 |
| 11694017 | Temperature-based on board placement of memory devices | Zhenlei Shen, Tingjun Xie | 2023-07-04 |
| 11688467 | Defect detection in memories with time-varying bit error rate | Zhengang Chen, Sai Krishna Mylavarapu, Zhenlei Shen, Tingjun Xie | 2023-06-27 |
| 11656936 | Managing write disturb for units of memory in a memory sub-system | Zhenming Zhou, Tingjun Xie | 2023-05-23 |
| 11615830 | Performing a refresh operation based on a characteristic of a memory sub-system | Tingjun Xie, Seungjune Jeon, Zhengang Chen, Zhenlei Shen | 2023-03-28 |
| 11495279 | Managing write disturb for units of memory in a memory sub-system using a randomized refresh period | Seungjune Jeon | 2022-11-08 |
| 11403195 | Application of dynamic trim strategy in a die-protection memory sub-system | Tingjun Xie | 2022-08-02 |
| 11341046 | Layer interleaving in multi-layered memory | Mikai Chen, Zhengang Chen | 2022-05-24 |
| 11056166 | Performing a refresh operation based on a characteristic of a memory sub-system | Tingjun Xie, Seungjune Jeon, Zhengang Chen, Zhenlei Shen | 2021-07-06 |
| 11037637 | Defect detection in memories with time-varying bit error rate | Zhengang Chen, Sai Krishna Mylavarapu, Zhenlei Shen, Tingjun Xie | 2021-06-15 |
| 10157676 | Dynamic tuning of first read countermeasures | Liang Pang, Yingda Dong, Jiahui Yuan | 2018-12-18 |
| 9911500 | Dummy voltage to reduce first read effect in memory | Liang Pang, Pao-Ling Koh, Jiahui Yuan, Yingda Dong | 2018-03-06 |
| 9715937 | Dynamic tuning of first read countermeasures | Liang Pang, Yingda Dong, Jiahui Yuan | 2017-07-25 |
| 9639463 | Heuristic aware garbage collection scheme in storage systems | Navneeth Kankani, Anand Kulkarni | 2017-05-02 |