Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
ML

Murong Lang — 79 Patents

Micron: 76 patents #206 of 6,374Top 4%
STSandisk Technologies: 3 patents #853 of 2,224Top 40%
San Jose, CA: #420 of 32,062 inventorsTop 2%
California: #3,542 of 386,348 inventorsTop 1%
Overall (All Time): #23,150 of 4,157,543Top 1%
79 Patents All Time
Murong Lang has been granted 79 US patents while listed as an inventor at Micron. The first was granted in 2017 and the most recent in December 2025. Murong Lang ranks #23,150 of 4,157,543 US inventors in our database (top 0.56%). Patent records list Murong Lang in San Jose, CA, US.

Issued Patents All Time

Showing 1–25 of 79 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12511080 Block family management for a virtual block Peng Zhang, Zhibiao Zhou, Lei Lin 2025-12-30
12505899 Power loss error detection using partial block handling Peng Zhang, Lei Lin, Zhan Xu, Li-Kai Chang, Zhiwang Chen +1 more 2025-12-23
12505894 Select gate maintenance with adaptive scan frequency in a memory sub-system Zhan Xu 2025-12-23
12481426 Optimizing data reliability using erase retention Zhan Xu, Ronit Roneel Prakash, Chih-Peng Lu, Zhibiao Zhou 2025-11-25
12482525 Apparatus with multi-deck read level management and methods for operating the same Tingjun Xie, Faliang Zhu, Jingde Zhu, Zhibiao Zhou 2025-11-25
12475058 Error avoidance for partially programmed blocks of a memory device Li-Kai Chang, Zhibiao Zhou 2025-11-18
12451189 Partial block handling protocol in a non-volatile memory device Zhan Xu, Tingjun Xie 2025-10-21
12431215 Dynamic read calibration Li-Te Chang, Aaron Lee, Zhenming Zhou 2025-09-30
12417026 Adaptive sensing time for memory operations Yu-Chung Lien, Zhenming Zhou, Ching-Huang Lu 2025-09-16
12394495 Adaptive integrity scan in a memory sub-system Li-Te Chang, Zhenming Zhou 2025-08-19
12387795 Low stress refresh erase in a memory device Ronit Roneel Prakash, Pitamber Shukla, Ching-Huang Lu, Zhenming Zhou 2025-08-12
12386515 Modification of program voltage level with read or program-verify adjustment for improving reliability in memory devices Peng Zhang, Lei Lin, Hanping Chen, Li-Te Chang, Zhengang Chen +1 more 2025-08-12
12379864 Empty page scan operations adjustment Peng Zhang, Christina Papagianni, Zhenming Zhou 2025-08-05
12354684 Managing an adaptive data path selection threshold for a memory sub-system Jian Huang, Zhenming Zhou, Zhongguang Xu, Jiangli Zhu 2025-07-08
12272418 Performing select gate integrity checks to identify and invalidate defective blocks Zhongguang Xu, Zhenlei Shen 2025-04-08
12260916 Partial block handling in a non-volatile memory device Zhongguang Xu, Nicola Ciocchini, Zhenlei Shen, Charles See Yeung Kwong, Ugo Russo +1 more 2025-03-25
12242755 Adaptive enhanced corrective read based on write and read temperature Zhenming Zhou, Ching-Huang Lu, Nagendra Prasad Ganesh Rao 2025-03-04
12216529 Adaptive frequency control for high-speed memory devices Jian Huang, Zhenming Zhou, Zhongguang Xu 2025-02-04
12217794 Managing the programming of an open translation unit Zhenming Zhou, Jian Huang, Tingjun Xie, Jiangli Zhu, Nagendra Prasad Ganesh Rao +1 more 2025-02-04
12210752 Managing a hybrid error recovery process in a memory sub-system Zhongguang Xu, Jian Huang, Tingjun Xie, Zhenming Zhou 2025-01-28
12198777 Read window management in a memory system Li-Te Chang, Zhenming Zhou, Ting Luo 2025-01-14
12176060 Open translation unit management using an adaptive read threshold Zhenming Zhou, Jian Huang, Zhongguang Xu, Jiangli Zhu 2024-12-24 $36,268,000
12169646 Managing threshold voltage drift based on operating characteristics of a memory sub-system Zhenming Zhou 2024-12-17 $47,790,000
12165709 Memory cell voltage level selection Tingjun Xie, Fangfang Zhu, Jiangli Zhu, Zhenming Zhou 2024-12-10 $27,965,000
12141467 Cross-temperature mitigation in a memory system Christina Papagianni, Zhenming Zhou, Ting Luo 2024-11-12 $38,266,000