Issued Patents All Time
Showing 25 most recent of 41 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12431215 | Dynamic read calibration | Li-Te Chang, Zhenming Zhou, Murong Lang | 2025-09-30 |
| 12333154 | Reducing bit error rate in memory devices | Tingjun Xie, Yang Liu, Jiangli Zhu, Juane Li | 2025-06-17 |
| 11966621 | Non-volatile storage system with program execution decoupled from dataload | Hua-Ling Cynthia Hsu | 2024-04-23 |
| 11342028 | Concurrent programming of multiple cells for non-volatile memory devices | Xiang Yang, Gerrit Jan Hemink, Ken Oowada, Toru Miwa | 2022-05-24 |
| 11004535 | Robust storage of bad column data and parity bits on word line | Hua-Ling Cynthia Hsu, YenLung Li | 2021-05-11 |
| 10978156 | Concurrent programming of multiple cells for non-volatile memory devices | Xiang Yang, Gerrit Jan Hemink, Ken Oowada, Toru Miwa | 2021-04-13 |
| 10832789 | System countermeasure for read operation during TLC program suspend causing ADL data reset with XDL data | Mahim Raj Gupta, Rohan Dhekane | 2020-11-10 |
| 10770158 | Detecting a faulty memory block | Mahim Raj Gupta, Rohit Sehgal, Rohan Dhekane, Niles Yang | 2020-09-08 |
| 10373696 | Methods and operations using XNOR functions with flash devices and solid state drives | Gautam Dusija, Mrinal Kochar, Deepak Raghu | 2019-08-06 |
| 10014056 | Changing storage parameters | Yi-Chieh Chen, Anne Pao-Ling Koh, Gulzar Kathawala, Mrinal Kochar | 2018-07-03 |
| 9983920 | System, method and apparatus for preventing data loss due to memory defects using latches | Abhijeet Bhalerao, Mrinal Kochar | 2018-05-29 |
| 9899077 | Write abort detection for multi-state memories | Cynthia Hsu, Abhijeet Manohar, Deepanshu Dutta | 2018-02-20 |
| 9858009 | Data folding in 3D nonvolatile memory | Abhijeet Bhalerao, Mrinal Kochar, Dennis S. Ea, Mikhail Palityka, Yew Yin Ng +1 more | 2018-01-02 |
| 9792175 | Bad column management in nonvolatile memory | Sahil Sharma, Abhijeet Manohar, Mrinal Kochar, Yong Huang, Derek McAuley +2 more | 2017-10-17 |
| 9760303 | Partially-bad block operation in 3-D nonvolatile memory | Dennis S. Ea, Ivan Baran, Mrinal Kochar, Mikhail Palityka, Yew Yin Ng +1 more | 2017-09-12 |
| 9728262 | Non-volatile memory systems with multi-write direction memory units | Ivan Baran, Mrinal Kochar, Mikhail Palityka, Dennis S. Ea, Yew Yin Ng +1 more | 2017-08-08 |
| 9653154 | Write abort detection for multi-state memories | Cynthia Hsu, Abhijeet Manohar, Deepanshu Dutta | 2017-05-16 |
| 9582435 | Memory system and method for efficient padding of memory pages | Vimal Kumar Jain, Abhijeet Manohar, Anne Pao-Ling Koh | 2017-02-28 |
| 9548105 | Enhanced post-write read for 3-D memory | Mrinal Kochar, Yew Yin Ng | 2017-01-17 |
| 9530517 | Read disturb detection in open blocks | Zhenming Zhou, Mrinal Kochar, Cynthia Hsu | 2016-12-27 |
| 9501400 | Identification and operation of sub-prime blocks in nonvolatile memory | Chun Sum Yeung, Jian Chen, Abhijeet Manohar, Chris Avila, Dana Lee +1 more | 2016-11-22 |
| 9460780 | Initialization techniques for multi-level memory cells using multi-pass programming | Mrinal Kochar, Abhijeet Bhalerao, Mikhail Palityka | 2016-10-04 |
| 9372629 | System, method and apparatus for preventing data loss due to memory defects using latches | Abhijeet Bhalerao, Mrinal Kochar | 2016-06-21 |
| 9342401 | Selective in-situ retouching of data in nonvolatile memory | Nian Niles Yang, Chris Avila, Steven T. Sprouse | 2016-05-17 |
| 8462564 | Flash memory programming power reduction | Yonggang Wu, Guowei Wang, Nian Yang, Sachit Chandra | 2013-06-11 |