| 12057188 |
Use of data latches for plane level compression of soft bit data in non-volatile memories |
Siddarth Naga Murty Bassa, Hua-Ling Cynthia Hsu |
2024-08-06 |
| 12009049 |
Non-volatile memory with shared data transfer latches |
Hua-Ling Cynthia Hsu, Siddarth Naga Murty Bassa, Jeongduk Sohn |
2024-06-11 |
| 11990185 |
Dynamic word line reconfiguration for NAND structure |
Xiang Yang, James Kai |
2024-05-21 |
| 11971826 |
Architecture and data path options for compression of soft bit data in non-volatile memories |
Hua-Ling Cynthia Hsu, A. Harihara Sravan |
2024-04-30 |
| 11971829 |
On-the-fly compression scheme for soft bit data in non-volatile memory |
Hua-Ling Cynthia Hsu, A. Harihara Sravan |
2024-04-30 |
| 11907545 |
On-the-fly multiplexing scheme for compressed soft bit data in non-volatile memories |
Siddarth Naga Murty Bassa, Chen Chen, Hua-Ling Cynthia Hsu |
2024-02-20 |
| 11901019 |
Use of data latches for compression of soft bit data in non-volatile memories |
Hua-Ling Cynthia Hsu, Masaaki Higashitani, Chen Chen |
2024-02-13 |
| 11776589 |
Vertical compression scheme for compressed soft bit data in non-volatile memories with data latch groups |
Hua-Ling Cynthia Hsu |
2023-10-03 |
| 11755211 |
Overhead reduction in data transfer protocol for NAND memory |
Grishma Shah, Daniel Tuers, Sahil Sharma, Hua-Ling Cynthia Hsu, Min Peng |
2023-09-12 |
| 11735288 |
Non-volatile storage system with power on read timing reduction |
Hua-Ling Cynthia Hsu |
2023-08-22 |
| 11487446 |
Overhead reduction in data transfer protocol for NAND memory |
Grishma Shah, Daniel Tuers, Sahil Sharma, Hua-Ling Cynthia Hsu, Min Peng |
2022-11-01 |
| 11386961 |
Centralized fixed rate serializer and deserializer for bad column management in non-volatile memory |
Chen Chen, Min Peng, Mitsuyuki Watanabe |
2022-07-12 |
| 11380417 |
Circuit to reduce gating overall system performance |
Cynthia Hsu, Min Peng |
2022-07-05 |
| 11152079 |
Circuits and methods for reliable replacement of bad columns in a memory device |
Siddarth Naga Murty Bassa |
2021-10-19 |
| 11004535 |
Robust storage of bad column data and parity bits on word line |
Hua-Ling Cynthia Hsu, Aaron Lee |
2021-05-11 |
| 10971202 |
Low latency data transfer |
Chen Chen, Min Peng |
2021-04-06 |
| 10838726 |
Asynchronous FIFO buffer for redundant columns in memory device |
Min Peng, Chen Chen |
2020-11-17 |
| 10825526 |
Non-volatile memory with reduced data cache buffer |
Hua-Ling Cynthia Hsu, Chen Chen, Min Peng |
2020-11-03 |
| 10811082 |
Non-volatile memory with fast data cache transfer scheme |
Hua-Ling Cynthia Hsu, Chen Chen, Min Peng |
2020-10-20 |
| 9721671 |
Memory device which performs verify operations using different sense node pre-charge voltages and a common discharge period |
Alexander Chu, Jong Hak Yuh, Kwang Ho Kim, Farookh Moogat |
2017-08-01 |
| 9595345 |
Adaptive selective bit line pre-charge for current savings and fast programming |
Man Lung Mui, Yee Lih Koh, Cynthia Hsu |
2017-03-14 |
| 9583220 |
Centralized variable rate serializer and deserializer for bad column management |
Wanfang Tsai, Chen Chen |
2017-02-28 |
| 9552882 |
Sense amplifier with efficient use of data latches |
Tai-Yuan Tseng, Cynthia Hsu, Kwang Ho Kim, Man Lung Mui |
2017-01-24 |
| 9490035 |
Centralized variable rate serializer and deserializer for bad column management |
Wanfang Tsai, Chen Chen |
2016-11-08 |