Issued Patents All Time
Showing 1–25 of 25 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9721671 | Memory device which performs verify operations using different sense node pre-charge voltages and a common discharge period | Alexander Chu, Jong Hak Yuh, Kwang Ho Kim, YenLung Li | 2017-08-01 |
| 9536617 | Ad hoc digital multi-die polling for peak ICC management | Ali Al-Shamma, Chang Hua Siau, Grishma Shah, Kenneth Louie, Khanh Nguyen +1 more | 2017-01-03 |
| 9311979 | I/O pin capacitance reduction using TSVs | Venkatesh Ramachandra | 2016-04-12 |
| 9293173 | Non-volatile memory and method with peak current control | Dana Lee, Yi-Chieh Chen | 2016-03-22 |
| 9245825 | I/O pin capacitance reduction using TSVS | Venkatesh Ramachandra | 2016-01-26 |
| 9201788 | In-situ block folding for nonvolatile memory | Chris Avila, Gautam Dusija, Deepak Raghu, Cynthia Hsu, Changyuan Chen | 2015-12-01 |
| 9053066 | NAND flash memory interface | Venkatesh Ramachandra | 2015-06-09 |
| 9053810 | Defect or program disturb detection with full data recovery capability | Deepanshu Dutta, Dana Lee, Yan Li, Grishma Shah, Masaaki Higashitani | 2015-06-09 |
| 9037902 | Flash memory techniques for recovering from write interrupt resulting from voltage fault | Gautam Dusija, Jianmin Huang, Chris Avila, Grishma Shah, Yi-Chieh Chen +1 more | 2015-05-19 |
| 8924626 | Phased NAND power-on reset | Steven S. Cheng, Dennis S. Ea, Jianmin Huang, Alexander Kwok-Tung Mak | 2014-12-30 |
| 8886877 | In-situ block folding for nonvolatile memory | Chris Avila, Gautam Dusija, Deepak Raghu, Cynthia Hsu, Changyuan Chen | 2014-11-11 |
| 8854900 | Non-volatile memory and method with peak current control | Dana Lee, Yi-Chieh Chen | 2014-10-07 |
| 8817569 | Immunity against temporary and short power drops in non-volatile memory | Yacov Duzly, Alon Marcu, Yan Li, Aaron K. Olbrich | 2014-08-26 |
| 7663950 | Method for column redundancy using data latches in solid-state memories | Raul-Adrian Cernea, Shou-Chang Tsao, Tai-Yuan Tseng | 2010-02-16 |
| 7489547 | Method of NAND flash memory cell array with adaptive memory state partitioning | Teruhiko Kamei | 2009-02-10 |
| 7489548 | NAND flash memory cell array with adaptive memory state partitioning | Teruhiko Kamei | 2009-02-10 |
| 7474561 | Variable program voltage increment values in non-volatile memory program operations | Yan Li, Fanglin Zhang, Toru Miwa | 2009-01-06 |
| 7450426 | Systems utilizing variable program voltage increment values in non-volatile memory program operations | Yan Li, Fanglin Zhang, Toru Miwa | 2008-11-11 |
| 7394690 | Method for column redundancy using data latches in solid-state memories | Raul-Adrian Cernea, Shouchang Tsao, Tai-Yuan Tseng | 2008-07-01 |
| 7366028 | Method of high-performance flash memory data transfer | Yishai Kagan, Rizwan Ahmed | 2008-04-29 |
| 7345926 | High-performance flash memory data transfer | Yishai Kagan, Rizwan Ahmed | 2008-03-18 |
| 7313023 | Partition of non-volatile memory array to reduce bit line capacitance | Yan Li | 2007-12-25 |
| 7262998 | Non-volatile system with program time control | Yan Li, Alexander Kwok-Tung Mak | 2007-08-28 |
| 7224605 | Non-volatile memory with redundancy data buffered in data latches for defective locations | Raul-Adrian Cernea, Shouchang Tsao, Tai-Yuan Tseng | 2007-05-29 |
| 7110298 | Non-volatile system with program time control | Yan Li, Alexander Kwok-Tung Mak | 2006-09-19 |