Issued Patents All Time
Showing 25 most recent of 53 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12430206 | Temperature sensor management during error handling operations in a memory sub-system | Hyungseok Kim, Zixiang Loh, Patrick R. Khayat, Jun Wan | 2025-09-30 |
| 12431205 | Adaptive calibration for threshold voltage offset bins | Vamsi Pavan Rayaprolu | 2025-09-30 |
| 12423013 | Open block family duration limited by temperature variation | Michael Sheperek, Larry J. Koudele, Bruce A. Liikanen | 2025-09-23 |
| 12424287 | Memory read voltage threshold tracking based on memory device-originated metrics characterizing voltage distributions | Shantilal Rayshi Doru, Patrick R. Khayat, Sampath K. Ratnam, Dung Viet Nguyen | 2025-09-23 |
| 12353771 | Charge loss mitigation throughout memory device lifecycle by proactive window shift | Ugo Russo, Vamsi Pavan Rayaprolu | 2025-07-08 |
| 12322473 | Determining read voltage offset in memory devices | Robert W. Mason, Pitamber Shukla | 2025-06-03 |
| 12307111 | Block family-based error avoidance for memory devices | Michael Sheperek, Kishore Kumar Muchherla, Mustafa N. Kaynak, Vamsi Pavan Rayaprolu, Bruce A. Liikanen +3 more | 2025-05-20 |
| 12293099 | Open block family duration limited by time and temperature | Michael Sheperek, Larry J. Koudele, Bruce A. Liikanen, Kishore Kumar Muchherla | 2025-05-06 |
| 12266420 | Temperature-compensated time estimate for a block to reach a uniform charge loss state | Patrick R. Khayat, Sivagnanam Parthasarathy, Mustafa N. Kaynak, Vamsi Pavan Rayaprolu | 2025-04-01 |
| 12223190 | Measurement of representative charge loss in a block to determine charge loss state | Patrick R. Khayat, Sivagnanam Parthasarathy, Mustafa N. Kaynak, Vamsi Pavan Rayaprolu | 2025-02-11 |
| 12210759 | Threshold voltage bin calibration at memory device power up | Chia-Yu Kuo | 2025-01-28 |
| 12131795 | Adaptive temperature compensation for a memory device | Vamsi Pavan Rayaprolu | 2024-10-29 |
| 12119068 | Program continuation strategies after memory device power loss | Gary F. Besinga, Vamsi Pavan Rayaprolu, Renato C. Padilla | 2024-10-15 |
| 12073866 | Two-stage voltage calibration upon power-up of memory device | Chia-Yu Kuo | 2024-08-27 |
| 12057190 | Determining read voltage offset in memory devices | Robert W. Mason, Pitamber Shukla | 2024-08-06 |
| 12040025 | Two-sided page scans with calibration feedback | Christopher M. Smitchger, Vamsi Pavan Rayaprolu, Patrick R. Khayat, Hyung Seok Kim | 2024-07-16 |
| 11977774 | Charge loss mitigation throughout memory device lifecycle by proactive window shift | Ugo Russo, Vamsi Pavan Rayaprolu | 2024-05-07 |
| 11955194 | Tracking and refreshing state metrics in memory sub-systems | Michael Sheperek, Bruce A. Liikanen | 2024-04-09 |
| 11922041 | Threshold voltage bin calibration at memory device power up | Chia-Yu Kuo | 2024-03-05 |
| 11914890 | Trim value loading management in a memory sub-system | Vamsi Pavan Rayaprolu | 2024-02-27 |
| 11886726 | Block family-based error avoidance for memory devices | Michael Sheperek, Kishore Kumar Muchherla, Mustafa N. Kaynak, Vamsi Pavan Rayaprolu, Bruce A. Liikanen +3 more | 2024-01-30 |
| 11886712 | Die family management on a memory device using block family error avoidance | — | 2024-01-30 |
| 11862274 | Determination of state metrics of memory sub-systems following power events | Michael Sheperek, Bruce A. Liikanen | 2024-01-02 |
| 11853556 | Combining sets of memory blocks in a memory device | Larry J. Koudele, Shane Nowell, Michael Sheperek, Bruce A. Liikanen | 2023-12-26 |
| 11854649 | Temperature-compensated time estimate for a block to reach a uniform charge loss state | Patrick R. Khayat, Sivagnanam Parthasarathy, Mustafa N. Kaynak, Vamsi Pavan Rayaprolu | 2023-12-26 |