Issued Patents All Time
Showing 25 most recent of 166 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12423013 | Open block family duration limited by temperature variation | Michael Sheperek, Larry J. Koudele, Steven Michael Kientz | 2025-09-23 |
| 12424288 | Adjustment of program verify targets corresponding to a last programming distribution and a programming distribution adjacent to an initial programming distribution | Larry J. Koudele, Michael Sheperek | 2025-09-23 |
| 12307111 | Block family-based error avoidance for memory devices | Michael Sheperek, Kishore Kumar Muchherla, Mustafa N. Kaynak, Vamsi Pavan Rayaprolu, Peter Feeley +3 more | 2025-05-20 |
| 12293099 | Open block family duration limited by time and temperature | Michael Sheperek, Larry J. Koudele, Steven Michael Kientz, Kishore Kumar Muchherla | 2025-05-06 |
| 12265447 | Memory sub-system with dynamic calibration using component-based function(s) | Gerald L. Cadloni, Violante Moschiano | 2025-04-01 |
| 12141443 | Dynamic temperature compensation in a memory component | Larry J. Koudele, Steve Kientz | 2024-11-12 |
| 12125539 | Adjustment of a starting voltage corresponding to a program operation in a memory sub-system | Michael Sheperek, Larry J. Koudele | 2024-10-22 |
| 12040026 | Adjustment of program verify targets corresponding to a last programming distribution and a programming distribution adjacent to an initial programming distribution | Larry J. Koudele, Michael Sheperek | 2024-07-16 |
| 12001286 | Memory device with dynamic processing level calibration | Larry J. Koudele | 2024-06-04 |
| 11983065 | Logic based read sample offset in a memory sub-system | Michael Sheperek | 2024-05-14 |
| 11955194 | Tracking and refreshing state metrics in memory sub-systems | Michael Sheperek, Steven Michael Kientz | 2024-04-09 |
| 11953980 | Memory sub-system with dynamic calibration using component-based function(s) | Gerald L. Cadloni, Violante Moschiano | 2024-04-09 |
| 11934666 | Memory device with dynamic program-verify voltage calibration | Larry J. Koudele | 2024-03-19 |
| 11908536 | First-pass continuous read level calibration | Michael Sheperek, Larry J. Koudele | 2024-02-20 |
| 11887676 | Adjusting program effective time using program step characteristics | — | 2024-01-30 |
| 11886726 | Block family-based error avoidance for memory devices | Michael Sheperek, Kishore Kumar Muchherla, Mustafa N. Kaynak, Vamsi Pavan Rayaprolu, Peter Feeley +3 more | 2024-01-30 |
| 11862274 | Determination of state metrics of memory sub-systems following power events | Michael Sheperek, Steven Michael Kientz | 2024-01-02 |
| 11853556 | Combining sets of memory blocks in a memory device | Steven Michael Kientz, Larry J. Koudele, Shane Nowell, Michael Sheperek | 2023-12-26 |
| 11842061 | Open block family duration limited by temperature variation | Michael Sheperek, Larry J. Koudele, Steven Michael Kientz | 2023-12-12 |
| 11842772 | Voltage bin boundary calibration at memory device power up | Michael Sheperek, Steve Kientz | 2023-12-12 |
| 11836345 | Memory element profiling and operational adjustments | Francis Chew | 2023-12-05 |
| 11817152 | Generating embedded data in memory cells in a memory sub-system | Michael Sheperek, Larry J. Koudele | 2023-11-14 |
| 11791004 | Threshold voltage offset bin selection based on die family in memory devices | Michael Sheperek, Steve Kientz, Anita Ekren, Gerald L. Cadloni | 2023-10-17 |
| 11789640 | Estimation of read level thresholds using a data structure | Michael Sheperek, Larry J. Koudele | 2023-10-17 |
| 11748008 | Changing of memory components to be used for a stripe based on an endurance condition | — | 2023-09-05 |