Patent Leaderboard
USPTO Patent Rankings Data through Sept 30, 2025
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Bruce A. Liikanen — 166 Patents

Micron: 124 patents #105 of 6,345Top 2%
MAMaxtor: 29 patents #5 of 656Top 1%
STSeagate Technology: 12 patents #462 of 4,626Top 10%
Berthoud, CO: #2 of 185 inventorsTop 2%
Colorado: #27 of 40,980 inventorsTop 1%
Overall (All Time): #5,007 of 4,157,543Top 1%
166 Patents All Time

Issued Patents All Time

Showing 26–50 of 166 patents

Patent #TitleCo-InventorsDate
11742027 Dynamic program erase targeting with bit error rate Michael Sheperek, Larry J. Koudele 2023-08-29
11735254 Error avoidance based on voltage distribution parameters of blocks Shane Nowell, Steven Michael Kientz, Michael Sheperek, Mustafa N. Kaynak, Kishore Kumar Muchherla +1 more 2023-08-22
11733928 Read sample offset bit determination in a memory sub-system Michael Sheperek 2023-08-22
11727994 Performing threshold voltage offset bin selection by package for memory devices Michael Sheperek, Kishore Kumar Muchherla, Mustafa N. Kaynak, Vamsi Pavan Rayaprolu, Larry J. Koudele 2023-08-15
11715530 Offset memory component automatic calibration (autocal) error recovery for a memory sub-system Gerald L. Cadloni, Gary F. Besinga, Michael G. Miller, Renato C. Padilla 2023-08-01
11714709 Enhanced block management for a memory subsystem Gerald L. Cadloni 2023-08-01
11714580 Dynamic background scan optimization in a memory sub-system Gerald L. Cadloni, Michael Sheperek, Francis Chew, Larry J. Koudele 2023-08-01
11709775 Write data for bin resynchronization after power loss Michael Sheperek, Steven Michael Kientz 2023-07-25
11705215 Memory sub-system with background scan and histogram statistics Gerald L. Cadloni 2023-07-18
11705208 Read level calibration in memory devices using embedded servo cells Larry J. Koudele, Michael Sheperek 2023-07-18
11705193 Error avoidance based on voltage distribution parameters Shane Nowell, Steven Michael Kientz, Michael Sheperek, Mustafa N. Kaynak, Kishore Kumar Muchherla +1 more 2023-07-18
11693745 Error-handling flows in memory devices based on bins Shane Nowell, Steven Michael Kientz 2023-07-04
11675511 Associating multiple cursors with block family of memory device Michael Sheperek, Peter Feeley, Larry J. Koudele, Shane Nowell, Steven Michael Kientz 2023-06-13
11675509 Multiple open block families supporting multiple cursors of a memory device Shane Nowell, Michael Sheperek, Larry J. Koudele, Steve Kientz 2023-06-13
11669380 Dynamic programming of page margins Michael Sheperek, Larry J. Koudele 2023-06-06
11669398 Memory components with ordered sweep error recovery Gerald L. Cadloni, Francis Chew, Larry J. Koudele 2023-06-06
11651828 First-pass dynamic program targeting (DPT) Michael Sheperek, Larry J. Koudele 2023-05-16
11636913 Tracking and refreshing state metrics in memory sub-systems Michael Sheperek, Steven Michael Kientz 2023-04-25
11609706 Read sample offset placement Michael Sheperek, Larry J. Koudele 2023-03-21
11600354 Determination of state metrics of memory sub-systems following power events Michael Sheperek, Steven Michael Kientz 2023-03-07
11600333 Adjustment of a voltage corresponding to a programming distribution based on a program targeting rule Michael Sheperek, Larry J. Koudele 2023-03-07
11579961 Bit error rate based dynamic program step characteristic adjustment 2023-02-14
11573720 Open block family duration limited by time and temperature Michael Sheperek, Larry J. Koudele, Steven Michael Kientz, Kishore Kumar Muchherla 2023-02-07
11545227 Threshold voltage offset bin selection based on die family in memory devices Michael Sheperek, Steve Kientz, Anita Ekren, Gerald L. Cadloni 2023-01-03
11526393 Memory sub-system with dynamic calibration using component-based function(s) Gerald L. Cadloni, Violante Moschiano 2022-12-13