| 6112307 |
Method and apparatus for translating signals between clock domains of different frequencies |
Jasmin Ajanovic, Kenneth C. Holland, Narendra Khandekar |
2000-08-29 |
| 6026455 |
Architecture and method for providing guaranteed access for a retrying bus master to a data transfer bridge connecting two buses in a computer system |
Nilesh V. Shah, James S. Coke, Jasmin Ajanovic, Rajeev Prasad |
2000-02-15 |
| 5794070 |
Method and apparatus for fast DMA transfer on an industry standard architecture (ISA) bus |
Jeffrey L. Rabe, Dave Smyth, David D. Lent, Sathyamurthi Sadhasivan, Stephen T. Rowland +2 more |
1998-08-11 |
| 5664117 |
Apparatus and method for prefetching data to load buffers in a bridge between two buses in a computer |
Nilesh V. Shah, Jasmin Ajanovic |
1997-09-02 |
| 5537664 |
Methods and apparatus for generating I/O recovery delays in a computer system |
Stephen T. Rowland |
1996-07-16 |
| 5519872 |
Fast address latch with automatic address incrementing |
Narendra Khandekar, Jasmin Ajanovic |
1996-05-21 |