Issued Patents All Time
Showing 26–50 of 187 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11935891 | Non-silicon N-type and P-type stacked transistors for integrated circuit devices | Gilbert Dewey, Ravi Pillarisetty, Rishabh Mehandru, Cheng-Ying Huang, Willy Rachmady +1 more | 2024-03-19 |
| 11916118 | Stacked source-drain-gate connection and process for forming such | Ehren Mannebach, Aaron D. Lilak, Hui Jae Yoo, Anh Phan, Willy Rachmady +2 more | 2024-02-27 |
| 11894372 | Stacked trigate transistors with dielectric isolation and process for forming such | Willy Rachmady, Cheng-Ying Huang, Gilbert Dewey, Aaron D. Lilak, Anh Phan +2 more | 2024-02-06 |
| 11894262 | Back side processing of integrated circuit structures to form insulation structure between adjacent transistor structures | Aaron D. Lilak, Rishabh Mehandru | 2024-02-06 |
| 11869894 | Metallization structures for stacked device connectivity and their methods of fabrication | Aaron D. Lilak, Anh Phan, Willy Rachmady, Gilbert Dewey, Jessica M. Torres +6 more | 2024-01-09 |
| 11854894 | Integrated circuit device structures and double-sided electrical testing | Valluri Rao, Rishabh Mehandru, Doug B. Ingerly, Kimin Jun, Kevin P. O'Brien +3 more | 2023-12-26 |
| 11830933 | Gate-all-around integrated circuit structures having depopulated channel structures using bottom-up oxidation approach | Willy Rachmady, Gilbert Dewey, Jack T. Kavalieros, Aaron D. Lilak, Anh Phan +2 more | 2023-11-28 |
| 11798838 | Capacitance reduction for semiconductor devices based on wafer bonding | Ehren Mannebach, Aaron D. Lilak, Rishabh Mehandru, Hui Jae Yoo, Kevin Lin | 2023-10-24 |
| 11776898 | Sidewall interconnect metallization structures for integrated circuit devices | Aaron D. Lilak, Anh Phan, Gilbert Dewey, Willy Rachmady | 2023-10-03 |
| 11769814 | Device including air gapping of gate spacers and other dielectrics and process for providing such | Ehren Mannebach, Aaron D. Lilak, Hui Jae Yoo, Kevin Lin, Tristan A. Tronic | 2023-09-26 |
| 11764104 | Forming an oxide volume within a fin | Cheng-Ying Huang, Gilbert Dewey, Jack T. Kavalieros, Aaron D. Lilak, Ehren Mannebach +3 more | 2023-09-19 |
| 11764263 | Gate-all-around integrated circuit structures having depopulated channel structures using multiple bottom-up oxidation approaches | Ehren Mannebach, Anh Phan, Aaron D. Lilak, Willy Rachmady, Gilbert Dewey +3 more | 2023-09-19 |
| 11749649 | Composite IC chips including a chiplet embedded within metallization layers of a host IC chip | Adel A. Elsherbini, Johanna M. Swan, Shawna M. Liff, Gerald Pasdast, Van H. Le | 2023-09-05 |
| 11742346 | Interconnect techniques for electrically connecting source/drain regions of stacked transistors | Aaron D. Lilak, Gilbert Dewey, Cheng-Ying Huang, Christopher J. Jezewski, Ehren Mannebach +4 more | 2023-08-29 |
| 11721649 | Microelectronic assemblies | Adel A. Elsherbini, Henning Braunisch, Kimin Jun, Brennen Mueller, Shawna M. Liff +2 more | 2023-08-08 |
| 11699637 | Vertically stacked transistor devices with isolation wall structures containing an electrical conductor | Aaron D. Lilak, Anh Phan, Stephanie A. Bojarski | 2023-07-11 |
| 11694986 | Vias in composite IC chip structures | Adel A. Elsherbini, Johanna M. Swan, Shawna M. Liff, Mauro Kobrinksy, Van H. Le +1 more | 2023-07-04 |
| 11676966 | Stacked transistors having device strata with different channel widths | Gilbert Dewey, Jack T. Kavalieros, Willy Rachmady, Cheng-Ying Huang, Matthew V. Metz +4 more | 2023-06-13 |
| 11672133 | Vertically stacked memory elements with air gap | Aaron D. Lilak, Hui Jae Yoo, Sean T. Ma, Scott B. Clendenning, Abhishek A. Sharma +2 more | 2023-06-06 |
| 11664377 | Forksheet transistor architectures | Aaron D. Lilak, Rishabh Mehandru, Ehren Mannebach, Willy Rachmady | 2023-05-30 |
| 11664373 | Isolation walls for vertically stacked transistor structures | Aaron D. Lilak, Gilbert Dewey, Willy Rachmady, Rishabh Mehandru | 2023-05-30 |
| 11658221 | Backside contact structures and fabrication for metal on both sides of devices | Rishabh Mehandru, Aaron D. Lilak, Kimin Jun | 2023-05-23 |
| 11658183 | Metallization structures under a semiconductor device layer | Aaron D. Lilak, Rishabh Mehandru, Stephen M. Cea | 2023-05-23 |
| 11658072 | Vertically stacked transistors in a fin | Aaron D. Lilak, Sean T. Ma, Justin R. Weber, Rishabh Mehandru | 2023-05-23 |
| 11646352 | Stacked source-drain-gate connection and process for forming such | Ehren Mannebach, Aaron D. Lilak, Hui Jae Yoo, Anh Phan, Willy Rachmady +2 more | 2023-05-09 |