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Spin logic with spin hall electrodes and charge interconnects |
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Spin logic device with high spin injection efficiency from a matched spin transfer layer |
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Spin logic with magnetic insulators switched by spin orbit coupling |
Dmitri E. Nikonov, Sasikanth Manipatruni, Ian A. Young |
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Metallic spin super lattice for logic and memory devices |
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Tunneling field effect transistors (TFETs) for CMOS architectures and approaches to fabricating N-type and P-type TFETs |
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Tunneling field effect transistors (TFETs) for CMOS architectures and approaches to fabricating N-type and P-type TFETs |
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N-type and P-type tunneling field effect transistors (TFETs) |
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Tunneling field effect transistors (TFETs) for CMOS approaches to fabricating N-type and P-type TFETs |
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