AS

Andrew H. Simon

IBM: 96 patents #604 of 70,183Top 1%
Globalfoundries: 17 patents #201 of 4,424Top 5%
Infineon Technologies Ag: 7 patents #1,452 of 7,486Top 20%
AM AMD: 3 patents #3,141 of 9,279Top 35%
SS Stmicroelectronics Sa: 3 patents #449 of 1,676Top 30%
RE Renesas Electronics: 2 patents #1,855 of 4,529Top 45%
TL Tokyo Electron Limited: 1 patents #3,538 of 5,567Top 65%
GU Globalfoundries U.S.: 1 patents #22 of 211Top 15%
UM United Microelectronics: 1 patents #2,686 of 4,560Top 60%
📍 Fishkill, NY: #4 of 387 inventorsTop 2%
🗺 New York: #433 of 115,490 inventorsTop 1%
Overall (All Time): #11,293 of 4,157,543Top 1%
113
Patents All Time

Issued Patents All Time

Showing 76–100 of 113 patents

Patent #TitleCo-InventorsDate
7592685 Device and methodology for reducing effective dielectric constant in semiconductor devices Daniel C. Edelstein, Matthew E. Colburn, Edward C. Cooney, III, Timothy J. Dalton, John A. Fitzsimmons +10 more 2009-09-22
7498256 Copper contact via structure using hybrid barrier layer Randolph F. Knarr, Christopher D. Sheraw, Anna W. Topol, Yun-Yu Wang, Keith Kwong Hon Wong 2009-03-03
7494915 Back end interconnect with a shaped interface Lawrence A. Clevenger, Andrew P. Cowley, Timothy J. Dalton, Mark Hoinkis, Steffen K. Kaldor +8 more 2009-02-24
7446036 Gap free anchored conductor and dielectric structure and method for fabrication thereof Tibor Bolom, Stephan Grunow, David L. Rath 2008-11-04
7405147 Device and methodology for reducing effective dielectric constant in semiconductor devices Daniel C. Edelstein, Matthew E. Colburn, Edward C. Cooney, III, Timothy J. Dalton, John A. Fitzsimmons +10 more 2008-07-29
7300867 Dual damascene interconnect structures having different materials for line and via conductors Jeffrey P. Gambino, Edward C. Cooney, III, Anthony K. Stamper, William T. Motsiff, Michael Lane 2007-11-27
7241681 Bilayered metal hardmasks for use in dual damascene etch schemes Kaushik A. Kumar, Lawrence A. Clevenger, Timothy J. Dalton, Douglas C. La Tulipe, Jr., Andy Cowley +5 more 2007-07-10
7241696 Method for depositing a metal layer on a semiconductor interconnect structure having a capping layer Larry Clevenger, Timothy J. Dalton, Mark Hoinkis, Steffen K. Kaldor, Kaushik A. Kumar +5 more 2007-07-10
7227265 Electroplated copper interconnection structure, process for making and electroplating bath Panayotis Andricacos, Steven H. Boettcher, Dean S. Chung, Hariklia Deligianni, James E. Fluegel +6 more 2007-06-05
7122462 Back end interconnect with a shaped interface Lawrence A. Clevenger, Andrew P. Cowley, Timothy J. Dalton, Mark Hoinkis, Steffen K. Kaldor +8 more 2006-10-17
7064064 Copper recess process with application to selective capping and electroless plating Shyng-Tsong Chen, Timothy J. Dalton, Kenneth M. Davis, Chao-Kun Hu, Fen F. Jamin +11 more 2006-06-20
7052621 Bilayered metal hardmasks for use in Dual Damascene etch schemes Kaushik A. Kumar, Lawrence A. Clevenger, Timothy J. Dalton, Douglas C. La Tulipe, Jr., Andy Cowley +5 more 2006-05-30
7037834 Constant emissivity deposition member Fenton R. McFeely, John J. Yurkas, Sandra G. Malhotra 2006-05-02
7001835 Crystallographic modification of hard mask properties Lawrence A. Clevenger, Andrew P. Cowley, Timothy J. Dalton, Mark Hoinkis, Steffen K. Kaldor +3 more 2006-02-21
6975032 Copper recess process with application to selective capping and electroless plating Shyng-Tsong Chen, Timothy J. Dalton, Kenneth M. Davis, Chao-Kun Hu, Fen F. Jamin +11 more 2005-12-13
6960519 Interconnect structure improvements Timothy J. Dalton, John A. Fitzsimmons, Jeffrey P. Gambino, Lee M. Nicholson, Anthony K. Stamper 2005-11-01
6958540 Dual damascene interconnect structures having different materials for line and via conductors Jeffrey P. Gambino, Edward C. Cooney, III, Anthony K. Stamper, William T. Motsiff, Michael Lane 2005-10-25
6949461 Method for depositing a metal layer on a semiconductor interconnect structure Sandra G. Malhotra 2005-09-27
6924223 Method of forming a metal layer using an intermittent precursor gas flow process Hideaki Yamasaki, Tsukasa Matsuda, Atsushi Gomi, Tatsuo Hatano, Mitsuhiro Tachibana +6 more 2005-08-02
6784105 Simultaneous native oxide removal and metal neutral deposition method Chih-Chao Yang, Yun-Yu Wang, Larry Clevenger, Stephen E. Greco, Kaushik Chanda +3 more 2004-08-31
6768203 Open-bottomed via liner structure and method for fabricating same Cyprian Emeka Uzoh 2004-07-27
6660330 Method for depositing metal films onto substrate surfaces utilizing a chamfered ring support Peter S. Locke, Sandra G. Malhotra, Fenton R. McFeely, John J. Yurkas 2003-12-09
6661097 Ti liner for copper interconnect with low-k dielectric Larry Clevenger, Stanley J. Klepeis, Hsiao-Ling Lu, Jeffrey R. Marino, Yun-Yu Wang +2 more 2003-12-09
6572982 Electromigration-resistant copper microstructure Cyprian Emeka Uzoh, Steven H. Boettcher, Patrick W. DeHaven, Christopher C. Parks 2003-06-03
6569783 Graded composition diffusion barriers for chip wiring applications Cyprian Emeka Uzoh, Daniel C. Edelstein 2003-05-27