SG

Stephan Grunow

IBM: 28 patents #3,676 of 70,183Top 6%
TI Texas Instruments: 15 patents #889 of 12,488Top 8%
AM AMD: 3 patents #3,141 of 9,279Top 35%
CM Chartered Semiconductor Manufacturing: 1 patents #419 of 840Top 50%
Globalfoundries: 1 patents #2,221 of 4,424Top 55%
Samsung: 1 patents #49,284 of 75,807Top 70%
Overall (All Time): #68,111 of 4,157,543Top 2%
44
Patents All Time

Issued Patents All Time

Showing 25 most recent of 44 patents

Patent #TitleCo-InventorsDate
10229875 Stacked via structure for metal fuse applications Griselda Bonilla, Kaushik Chanda, Ronald G. Filippi, Naftali E. Lustig, Andrew H. Simon +1 more 2019-03-12
9893011 Back-end electrically programmable fuse Junjing Bao, Griselda Bonilla, Kaushik Chanda, Samuel S. Choi, Ronald G. Filippi +3 more 2018-02-13
9685404 Back-end electrically programmable fuse Junjing Bao, Griselda Bonilla, Kaushik Chanda, Samuel S. Choi, Ronald G. Filippi +3 more 2017-06-20
9425144 Metal fuse structure for improved programming capability Griselda Bonilla, Kaushik Chanda, Samuel S. Choi, Ronald G. Filippi, Naftali E. Lustig +2 more 2016-08-23
9360525 Stacked via structure for metal fuse applications Griselda Bonilla, Kaushik Chanda, Ronald G. Filippi, Naftali E. Lustig, Andrew H. Simon +1 more 2016-06-07
9142506 E-fuse structures and methods of manufacture Griselda Bonilla, Kaushik Chanda, Samuel S. Choi, Ronald G. Filippi, Naftali E. Lustig +1 more 2015-09-22
9093164 Redundant via structure for metal fuse applications Ronald G. Filippi, Griselda Bonilla, Kaushik Chanda, Samuel S. Choi, Naftali E. Lustig +1 more 2015-07-28
9059169 E-fuse structures and methods of manufacture Griselda Bonilla, Kaushik Chanda, Samuel S. Choi, Ronald G. Filippi, Naftali E. Lustig +1 more 2015-06-16
8962467 Metal fuse structure for improved programming capability Griselda Bonilla, Kaushik Chanda, Samuel S. Choi, Ronald G. Filippi, Naftali E. Lustig +2 more 2015-02-24
8836124 Fuse and integrated conductor Griselda Bonilla, Kaushik Chanda, Samuel S. Choi, Ronald G. Filippi, Naftali E. Lustig +1 more 2014-09-16
8742766 Stacked via structure for metal fuse applications Griselda Bonilla, Kaushik Chanda, Ronald G. Filippi, Naftali E. Lustig, Andrew H. Simon +1 more 2014-06-03
8633707 Stacked via structure for metal fuse applications Ronald G. Filippi, Griselda Bonilla, Kaushik Chanda, Naftali E. Lustig, Andrew H. Simon +1 more 2014-01-21
8444868 Method for removing copper oxide layer Tien-Jen Cheng, Zhengwen Li, Huilong Zhu 2013-05-21
8367544 Self-aligned patterned etch stop layers for semiconductor devices Kangguo Cheng, Lawrence A. Clevenger, Johnathan E. Faltermeier, Kaushik A. Kumar, Kevin S. Petrarca 2013-02-05
8298948 Capping of copper interconnect lines in integrated circuit devices Griselda Bonilla, Kaushik Chanda, Ronald G. Filippi, David L. Rath, Sujatha Sankaran +3 more 2012-10-30
8232646 Interconnect structure for integrated circuits having enhanced electromigration resistance Griselda Bonilla, Kaushik Chanda, Ronald G. Filippi, Chao-Kun Hu, Naftali E. Lustig +2 more 2012-07-31
8211794 Properties of metallic copper diffusion barriers through silicon surface treatments Valli Arunachalam, Satyavolu Srinivas Papa Rao, Sanjeev Aggarwal 2012-07-03
8056039 Interconnect structure for integrated circuits having improved electromigration characteristics Kaushik Chanda, Ronald G. Filippi, Chao-Kun Hu, Sujatha Sankaran, Andrew H. Simon +1 more 2011-11-08
8026166 Interconnect structures comprising capping layers with low dielectric constants and methods of making the same Griselda Bonilla, Tien-Jen Cheng, Lawrence A. Clevenger, Chao-Kun Hu, Roger A. Quon +5 more 2011-09-27
7985928 Gap free anchored conductor and dielectric structure and method for fabrication thereof Tibor Bolom, David L. Rath, Andrew H. Simon 2011-07-26
7888252 Self-aligned contact Johnathan E. Faltermeier, Kangguo Cheng, Kevin S. Petrarca, Kaushik A. Kumar, Lawrence A. Clevenger +2 more 2011-02-15
7833893 Method for forming conductive structures Kaushik A. Kumar, Kevin S. Petrarca, Richard P. Volant 2010-11-16
7825019 Structures and methods for reduction of parasitic capacitances in semiconductor integrated circuits Lawrence A. Clevenger, Kaushik A. Kumar, Kevin S. Petrarca, Vidhya Ramachandran 2010-11-02
7781884 Method of fabrication of on-chip heat pipes and ancillary heat transfer components Sameer Ajmera, Phillip D. Matz, Satyavolu Srinivas Papa Rao 2010-08-24
7776737 Reliability of wide interconnects Griselda Bonilla, Kaushik Chanda, Ronald G. Filippi, Sujatha Sankaran, Andrew H. Simon +1 more 2010-08-17