Issued Patents All Time
Showing 26–44 of 44 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7737528 | Structure and method of forming electrically blown metal fuses for integrated circuits | Griselda Bonilla, Kaushik Chanda, Ronald G. Filippi, Jeffrey P. Gambino, Chao-Kun Hu +3 more | 2010-06-15 |
| 7674707 | Manufacturable reliable diffusion-barrier | Noel Russell, Satyavolu S. Papa Rao | 2010-03-09 |
| 7671362 | Test structure for determining optimal seed and liner layer thicknesses for dual damascene processing | Tibor Bolom, Kaushik Chanda, Ronald G. Filippi, Paul S. McLaughlin, Sujatha Sankaran +3 more | 2010-03-02 |
| 7642619 | Air gap in integrated circuit inductor fabrication | Phillip D. Matz, Satyavolu S. Papa Rao | 2010-01-05 |
| 7629264 | Structure and method for hybrid tungsten copper metal contact | Griselda Bonilla, Kaushik A. Kumar, Lawrence A. Clevenger, Kevin S. Petrarca, Roger A. Quon | 2009-12-08 |
| 7566627 | Air gap in integrated circuit inductor fabrication | Phillip D. Matz, Satyavolu Srinivas Papa Rao | 2009-07-28 |
| 7517736 | Structure and method of chemically formed anchored metallic vias | Sanjay C. Mehta, Daniel C. Edelstein, John A. Fitzsimmons, Henry A. Nye, III, David L. Rath | 2009-04-14 |
| 7485963 | Use of supercritical fluid for low effective dielectric constant metallization | Satyavolu S. Papa Rao, Phillip D. Matz | 2009-02-03 |
| 7456099 | Method of forming a structure for reducing lateral fringe capacitance in semiconductor devices | Lawrence A. Clevenger, Kaushik A. Kumar, Kevin S. Petrarca, Vidhya Ramachandran, Theodorus E. Standaert | 2008-11-25 |
| 7446036 | Gap free anchored conductor and dielectric structure and method for fabrication thereof | Tibor Bolom, David L. Rath, Andrew H. Simon | 2008-11-04 |
| 7338893 | Integration of pore sealing liner into dual-damascene methods and devices | Edward R. Engbrecht, Satyavolu Srinivas Papa Rao, Sameer Ajmera | 2008-03-04 |
| 7256121 | Contact resistance reduction by new barrier stack process | Duofeng Yue, Satyavolu Srinivas Papa Rao, Noel Russell, Montray Leavy | 2007-08-14 |
| 7189615 | Single mask MIM capacitor and resistor with in trench copper drift barrier | Satyavolu Srinivas Papa Rao, Darius Crenshaw, Kenneth D. Brennan, Somit Joshi, Montray Leavy +3 more | 2007-03-13 |
| 7179747 | Use of supercritical fluid for low effective dielectric constant metallization | Satyavolu S. Papa Rao, Phillip D. Matz | 2007-02-20 |
| 7148140 | Partial plate anneal plate process for deposition of conductive fill material | Montray Leavy, Satyavolu Srinivas Papa Rao, Noel Russell | 2006-12-12 |
| 7115467 | Metal insulator metal (MIM) capacitor fabrication with sidewall barrier removal aspect | Sameer Ajmera, Darius Crenshaw, Satyavolu S. Papa Rao, Phillip D. Matz | 2006-10-03 |
| 7037837 | Method of fabricating robust nucleation/seed layers for subsequent deposition/fill of metallization layers | Satyavolu S. Papa Rao, Noel Russell | 2006-05-02 |
| 6900127 | Multilayer integrated circuit copper plateable barriers | Satyavolu S. Papa Rao, Noel Russell | 2005-05-31 |
| 6864108 | Measurement of wafer temperature in semiconductor processing chambers | Satyavolu S. Papa Rao, Noel Russell | 2005-03-08 |