SS

Sujatha Sankaran

IBM: 17 patents #6,502 of 70,183Top 10%
AM AMD: 1 patents #5,683 of 9,279Top 65%
Overall (All Time): #277,650 of 4,157,543Top 7%
17
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
8343868 Device and methodology for reducing effective dielectric constant in semiconductor devices Daniel C. Edelstein, Matthew E. Colburn, Edward C. Cooney, III, Timothy J. Dalton, John A. Fitzsimmons +10 more 2013-01-01
8298948 Capping of copper interconnect lines in integrated circuit devices Griselda Bonilla, Kaushik Chanda, Ronald G. Filippi, Stephan Grunow, David L. Rath +3 more 2012-10-30
8129286 Reducing effective dielectric constant in semiconductor devices Daniel C. Edelstein, Matthew E. Colburn, Edward C. Cooney, III, Timothy J. Dalton, John A. Fitzsimmons +10 more 2012-03-06
8056039 Interconnect structure for integrated circuits having improved electromigration characteristics Kaushik Chanda, Ronald G. Filippi, Stephan Grunow, Chao-Kun Hu, Andrew H. Simon +1 more 2011-11-08
7968456 Method of forming an embedded barrier layer for protection from chemical mechanical polishing process Paul S. McLaughlin, Theodorus E. Standaert 2011-06-28
7947907 Electronics structures using a sacrificial multi-layer hardmask scheme Matthew E. Colburn, Ricardo A. Donaton, Conal E. Murray, Satyanarayana V. Nitta, Sampath Purushothaman +2 more 2011-05-24
7892940 Device and methodology for reducing effective dielectric constant in semiconductor devices Daniel C. Edelstein, Matthew E. Colburn, Edward C. Cooney, III, Timothy J. Dalton, John A. Fitzsimmons +10 more 2011-02-22
7776737 Reliability of wide interconnects Griselda Bonilla, Kaushik Chanda, Ronald G. Filippi, Stephan Grunow, Andrew H. Simon +1 more 2010-08-17
7737528 Structure and method of forming electrically blown metal fuses for integrated circuits Griselda Bonilla, Kaushik Chanda, Ronald G. Filippi, Jeffrey P. Gambino, Stephan Grunow +3 more 2010-06-15
7671362 Test structure for determining optimal seed and liner layer thicknesses for dual damascene processing Tibor Bolom, Kaushik Chanda, Ronald G. Filippi, Stephan Grunow, Paul S. McLaughlin +3 more 2010-03-02
7645700 Dry etchback of interconnect contacts Theodorus E. Standaert, William Brearley, Stephen E. Greco 2010-01-12
7592685 Device and methodology for reducing effective dielectric constant in semiconductor devices Daniel C. Edelstein, Matthew E. Colburn, Edward C. Cooney, III, Timothy J. Dalton, John A. Fitzsimmons +10 more 2009-09-22
7488679 Interconnect structure and process of making the same Theodorus E. Standaert, Pegeen M. Davis, John A. Fitzsimmons, Stephen E. Greco, Tze-man Ko +2 more 2009-02-10
7405147 Device and methodology for reducing effective dielectric constant in semiconductor devices Daniel C. Edelstein, Matthew E. Colburn, Edward C. Cooney, III, Timothy J. Dalton, John A. Fitzsimmons +10 more 2008-07-29
7394154 Embedded barrier for dielectric encapsulation Paul S. McLaughlin, Theodorus E. Standaert 2008-07-01
7371684 Process for preparing electronics structures using a sacrificial multilayer hardmask scheme Matthew E. Colburn, Ricardo A. Donaton, Conal E. Murray, Satyanarayana V. Nitta, Sampath Purushothaman +2 more 2008-05-13
7323410 Dry etchback of interconnect contacts Theodorus E. Standaert, William Brearley, Stephen E. Greco 2008-01-29