Issued Patents 2016
Showing 51–75 of 114 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9412678 | Structure and method for 3D IC package | Shang-Yun Hou, Der-Chyang Yeh, Shin-Puu Jeng | 2016-08-09 |
| 9406776 | High temperature gate replacement process | Chung-Shi Liu | 2016-08-02 |
| 9406648 | Power supply arrangement for semiconductor device | Chuei-Tang Wang, Monsen Liu, Sen-Kuei Hsu | 2016-08-02 |
| 9401337 | Molding structure for wafer level package | Chung-Shi Liu, Chih-Fan Huang, Chih-Wei Lin, Wei-Hung Lin, Ming-Da Cheng | 2016-07-26 |
| 9397056 | Semiconductor device having trench adjacent to receiving area and method of forming the same | Yen-Ping Wang, Chao-Wen Shih, Yung-Ping Chiang, Shih-Wei Liang, Tsung-Yuan Yu +2 more | 2016-07-19 |
| 9396300 | Packaging methods for semiconductor devices, packaged semiconductor devices, and design methods thereof | Chuei-Tang Wang, Monsen Liu | 2016-07-19 |
| 9397060 | Package on package structure | Mirng-Ji Lii, Hao-Yi Tsai, Hsien-Wei Chen, Kai-Chiang Wu | 2016-07-19 |
| 9397137 | Interconnect structure for CIS flip-chip bonding and methods for forming the same | Yung Ching Chen, Chien-Hsun Lee, Mirng-Ji Lii | 2016-07-19 |
| 9391350 | RF choke device for integrated circuits | Jeng-Shien Hsieh, Monsen Liu, Chung-Hao Tsai, Lai Wei Chih, Yeh En-Hsiang +1 more | 2016-07-12 |
| 9385091 | Reinforcement structure and method for controlling warpage of chip mounted on substrate | Shang-Yun Hou, Cheng-Chieh Hsieh, Tsung-Shu Lin | 2016-07-05 |
| 9379078 | 3D die stacking structure with fine pitches | Chen-Shien Chen, Yen-Chang Hu | 2016-06-28 |
| 9373604 | Interconnect structures for wafer level package and methods of forming same | Chung-Shi Liu | 2016-06-21 |
| 9372206 | Testing of semiconductor chips with microbumps | Wei-Cheng Wu, Hsien-Pin Hu, Shang-Yun Hou, Shin-Puu Jeng, Chao-Hsiang Yang | 2016-06-21 |
| 9373527 | Chip on package structure and method | Der-Chyang Yeh, Kuo-Chung Yee, Jui-Pin Hung | 2016-06-21 |
| 9373755 | Light-emitting diodes on concave texture substrate | Hung-Ta Lin, Wen-Chih Chiou, Ding-Yuan Chen, Chia-Lin Yu | 2016-06-21 |
| 9373605 | DIE packages and methods of manufacture thereof | Chuei-Tang Wang | 2016-06-21 |
| 9368460 | Fan-out interconnect structure and method for forming same | Yen-Chang Hu, Ching-Wen Hsiao, Mirng-Ji Lii, Chung-Shi Liu, Chien Ling Hwang +2 more | 2016-06-14 |
| 9368454 | Semiconductor device with shielding layer in post-passivation interconnect structure | Chung-Hao Tsai, Wei-Chih Lai, Chuei-Tang Wang | 2016-06-14 |
| 9362197 | Molded underfilling for package on package devices | Chien-Hsun Lee, Jung Wei Cheng, Tsung-Ding Wang, Ming-Da Cheng, Yung Ching Chen | 2016-06-07 |
| 9362164 | Hybrid interconnect scheme and methods for forming the same | Tien-I Bao | 2016-06-07 |
| 9355956 | Inductor for semiconductor integrated circuit | Hao-Hsiang Chuang, Jeng-Shien Hsieh, Chuei-Tang Wang | 2016-05-31 |
| 9355978 | Packaging devices and methods of manufacture thereof | Hsien-Wei Chen, Tsung-Yuan Yu, Hao-Yi Tsai, Mirng-Ji Lii | 2016-05-31 |
| 9349701 | Self-aligning conductive bump structure and method of fabrication | Cheng-Lin Huang, I-Ting Chen, Ying-Ching Shih, Po-Hao Tsai, Szu-Wei Lu +2 more | 2016-05-24 |
| 9343419 | Bump structures for semiconductor package | Meng-Liang Lin, Jy-Jie Gau, Cheng-Lin Huang, Jing-Cheng Lin, Kuo-Ching Hsu | 2016-05-17 |
| 9343433 | Packages with stacked dies and methods of forming the same | Chien-Hsun Lee, Tsung-Ding Wang, Mirng-Ji Lii | 2016-05-17 |