Issued Patents 2016
Showing 1–21 of 21 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9502533 | Silicon recess etch and epitaxial deposit for shallow trench isolation (STI) | Harry-Hak-Lay Chuang, Bao-Ru Young, Kong-Pin Chang, Chia Ming Liang, Meng-Fang Hsu +2 more | 2016-11-22 |
| 9502514 | Memory devices and method of forming same | Chang-Ming Wu, Shih-Chang Liu, Chia-Shiung Tsai, Harry-Hak-Lay Chuang | 2016-11-22 |
| 9502343 | Dummy metal with zigzagged edges | Cheng-Hsien Hsieh, Hsien-Wei Chen, Chi-Hsi Wu, Chen-Hua Yu, Der-Chyang Yeh +1 more | 2016-11-22 |
| 9496276 | CMP fabrication solution for split gate memory embedded in HK-MG process | Harry-Hak-Lay Chuang, Chang-Ming Wu, Shih-Chang Liu | 2016-11-15 |
| 9484351 | Split gate memory device and method of fabricating the same | Chang-Ming Wu, Shih-Chang Liu, Harry-Hak-Lay Chuang, Chia-Shiung Tsai | 2016-11-01 |
| 9472636 | Cost-effective gate replacement process | Ming Zhu, Bao-Ru Young, Harry-Hak-Lay Chuang, Jyun-Ming Lin | 2016-10-18 |
| 9462692 | Test structure and method of testing electrical characteristics of through vias | Shang-Yun Hou, Hsien-Pin Hu, Jung Cheng Ko, Shin-Puu Jeng, Chen-Hua Yu +1 more | 2016-10-04 |
| 9431413 | STI recess method to embed NVM memory in HKMG replacement gate technology | Harry-Hak-Lay Chuang, Ya-Chen Kao | 2016-08-30 |
| 9425206 | Boundary scheme for embedded poly-SiON CMOS or NVM in HKMG CMOS technology | Harry-Hak-Lay Chuang, Ya-Chen Kao, Shih-Chang Liu, Fang-Lan Chu | 2016-08-23 |
| 9425126 | Dummy structure for chip-on-wafer-on-substrate | Pei-Ching Kuo, Yi-Hsiu Chen, Jun-Lin Yeh, Yung-Chi Lin, Li-Han Hsu +2 more | 2016-08-23 |
| 9397112 | L-shaped capacitor in thin film storage technology | Harry-Hak-Lay Chuang, Chien-Hung Chang | 2016-07-19 |
| 9392266 | Three-dimensional display device | Kuo-Sen Kung, Chun-Hao Tu, Ren-Hong Jhan, Fang-Hui Chan, Jen-Pei Tseng +2 more | 2016-07-12 |
| 9390927 | Contact formation for split gate flash memory | Harry-Hak-Lay Chuang, Ya-Chen Kao, Chin-Yi Huang | 2016-07-12 |
| 9378961 | Methods of fabricating multiple gate stack compositions | Po-Nien Chen, Bao-Ru Young, Chi-Hsun Hsieh, Harry-Hak-Lay Chuang, Eric Huang | 2016-06-28 |
| 9372951 | Semiconductor device design methods and conductive bump pattern enhancement methods | Tzu-Yu Wang, Kuo-Ching Hsu, Shang-Yun Hou, Shin-Puu Jeng | 2016-06-21 |
| 9372206 | Testing of semiconductor chips with microbumps | Hsien-Pin Hu, Shang-Yun Hou, Shin-Puu Jeng, Chen-Hua Yu, Chao-Hsiang Yang | 2016-06-21 |
| 9349742 | Embedded memory and methods of forming the same | Harry-Hak-Lay Chuang | 2016-05-24 |
| 9287279 | Silicon nitride (SiN) encapsulating layer for silicon nanocrystal memory storage | Yu-Hsing Chang, Chang-Ming Wu, Shih-Chang Liu, Chia-Shiung Tsai, Ru-Liang Lee +1 more | 2016-03-15 |
| 9281056 | Static random access memory and method of using the same | Wei Min Chan, Yen-Huei Chen, Hung-Jen Liao, Ping-Wei Wang | 2016-03-08 |
| 9276010 | Dual silicide formation method to embed split gate flash memory in high-k metal gate (HKMG) technology | Harry-Hak-Lay Chuang, Ya-Chen Kao, Fang-Lan Chu | 2016-03-01 |
| 9230977 | Embedded flash memory device with floating gate embedded in a substrate | Harry-Hak-Lay Chuang | 2016-01-05 |