Issued Patents 2016
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9508666 | Packaging structures and methods with a metal pillar | Chen-Hua Yu, Shin-Puu Jeng, Shang-Yun Hou, Kuo-Ching Hsu, Cheng-Chieh Hsieh +3 more | 2016-11-29 |
| 9496235 | Pillar design for conductive bump | Cheng-Chieh Hsieh, Cheng-Lin Huang, Shang-Yun Hou, Jing-Cheng Lin, Shin-Puu Jeng | 2016-11-15 |
| 9478498 | Through package via (TPV) | Jing-Cheng Lin | 2016-10-25 |
| 9460987 | Interconnect structure for package-on-package devices and a method of fabricating | Jui-Pin Hung, Jing-Cheng Lin, Yi-Jou Lin, Shuo-Mao Chen, Chiung-Han Yeh +1 more | 2016-10-04 |
| 9455211 | Integrated fan-out structure with openings in buffer layer | Wu Sen Chiu, Li-Hui Cheng, Jing-Cheng Lin | 2016-09-27 |
| 9425121 | Integrated fan-out structure with guiding trenches in buffer layer | Feng-Cheng Hsu, Li-Hui Cheng, Jui-Pin Hung, Jing-Cheng Lin | 2016-08-23 |
| 9406588 | Semiconductor package and manufacturing method thereof | Jing-Cheng Lin, Ying-Ching Shih, Szu-Wei Lu | 2016-08-02 |
| 9368438 | Package on package (PoP) bonding structures | Jing-Cheng Lin, Jui-Pin Hung | 2016-06-14 |
| 9355977 | Bump structures for semiconductor package | Jing-Cheng Lin | 2016-05-31 |
| 9355973 | Packaged semiconductor devices, methods of packaging semiconductor devices, and PoP devices | Jui-Pin Hung, Jing-Cheng Lin | 2016-05-31 |
| 9349701 | Self-aligning conductive bump structure and method of fabrication | Cheng-Lin Huang, I-Ting Chen, Ying-Ching Shih, Szu-Wei Lu, Jing-Cheng Lin +2 more | 2016-05-24 |
| 9318455 | Method of forming a plurality of bumps on a substrate and method of forming a chip package | Jing-Cheng Lin | 2016-04-19 |
| 9252065 | Mechanisms for forming package structure | Jing-Cheng Lin | 2016-02-02 |