Issued Patents 2016
Showing 1–24 of 24 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9514986 | Device with capped through-substrate via structure | Yung-Chi Lin, Yen-Hung Chen, Yin Chen, Ebin Liao, Ku-Feng Yang +1 more | 2016-12-06 |
| 9478480 | Alignment mark and method of formation | Chen-Yu Tsai, Shih-Hui Wang, Chien-Ming Chiu, Chia-Ho Chen, Fang Wen Tsai +4 more | 2016-10-25 |
| 9449898 | Semiconductor device having backside interconnect structure through substrate via and method of forming the same | Yung-Chi Lin, Hsin-Yu Chen, Ming-Tsu Chung, HsiaoYun Lo, Hong-Ye Shih +3 more | 2016-09-20 |
| 9449875 | Wafer backside interconnect structure connected to TSVs | Ming-Fa Chen, Shau-Lin Shue | 2016-09-20 |
| 9425126 | Dummy structure for chip-on-wafer-on-substrate | Pei-Ching Kuo, Yi-Hsiu Chen, Jun-Lin Yeh, Yung-Chi Lin, Li-Han Hsu +2 more | 2016-08-23 |
| 9418933 | Through-substrate via formation with improved topography control | Yung-Chi Lin, Yi-Hsiu Chen, Ku-Feng Yang | 2016-08-16 |
| 9418961 | Apparatus and method of substrate to substrate bonding for three dimensional (3D) IC interconnects | Chen-Hua Yu, Weng-Jin Wu | 2016-08-16 |
| 9418923 | Semiconductor component having through-silicon vias and method of manufacture | Chen-Hua Yu, Cheng-Hung Chang, Ebin Liao, Chia-Lin Yu, Hsiang-Yi Wang +4 more | 2016-08-16 |
| 9406650 | Methods of packaging semiconductor devices and packaged semiconductor devices | Shin-Puu Jeng, Tu-Hao Yu, Hung-Jung Tu, Yu-Liang Lin, Shih-Hui Wang | 2016-08-02 |
| 9390949 | Wafer debonding and cleaning apparatus and method of use | Yu-Liang Lin, Hung-Jung Tu | 2016-07-12 |
| 9373575 | TSV structures and methods for forming the same | Yung-Chi Lin, Hsin-Yu Chen, Ku-Feng Yang, Tsang-Jiuh Wu, Jing-Cheng Lin | 2016-06-21 |
| 9373755 | Light-emitting diodes on concave texture substrate | Chen-Hua Yu, Hung-Ta Lin, Ding-Yuan Chen, Chia-Lin Yu | 2016-06-21 |
| 9324756 | CIS chips and methods for forming the same | Chen-Hua Yu, Jing-Cheng Lin | 2016-04-26 |
| 9312225 | Bump structure for stacked dies | Hung-Pin Chang, Kuo-Ching Hsu, Chen-Shien Chen, Chen-Hua Yu | 2016-04-12 |
| 9305769 | Thin wafer handling method | Chen-Hua Yu, Shin-Puu Jeng, Hung-Jung Tu | 2016-04-05 |
| 9299612 | Stacked structures and methods of forming stacked structures | Weng-Jin Wu, Chen-Hua Yu | 2016-03-29 |
| 9299676 | Through silicon via structure | Chen-Hua Yu, Shin-Puu Jeng, Fang Wen Tsai, Chen-Yu Tsai | 2016-03-29 |
| 9293418 | Backside through vias in a bonded structure | Weng-Jin Wu, Ku-Feng Yang, Hung-Pin Chang, Chen-Hua Yu | 2016-03-22 |
| 9287166 | Barrier for through-silicon via | Chen-Hua Yu, Weng-Jin Wu | 2016-03-15 |
| 9281254 | Methods of forming integrated circuit package | Chen-Hua Yu, Chi-Hsi Wu, Hsiang-Fan Lee, Shih-Peng Tai, Tang-Jung Chiu | 2016-03-08 |
| 9263511 | Package with metal-insulator-metal capacitor and method of manufacturing the same | Chen-Hua Yu, Shang-Yun Hou, Jui-Pin Hung, Der-Chyang Yeh, Chiung-Han Yeh | 2016-02-16 |
| 9263382 | Through substrate via structures and methods of forming the same | Ku-Feng Yang, Tsang-Jiuh Wu, Yi-Hsiu Chen, Ebin Liao, Yuan-Hung Liu | 2016-02-16 |
| 9252110 | Interconnect structure and method of forming same | Hsiao Yun Lo, Lin-Chih Huang, Tasi-Jung Wu, Hsin-Yu Chen, Yung-Chi Lin +2 more | 2016-02-02 |
| 9240349 | Interconnect structures for substrate | Chen-Hua Yu, Shin-Puu Jeng, Tsang-Jiuh Wu | 2016-01-19 |