Issued Patents All Time
Showing 501–525 of 694 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9240349 | Interconnect structures for substrate | Chen-Hua Yu, Wen-Chih Chiou, Tsang-Jiuh Wu | 2016-01-19 |
| 9230902 | Interconnect structure for wafer level package | Chen-Hua Yu, Jing-Cheng Lin, Nai-Wei Liu, Jui-Pin Hung | 2016-01-05 |
| 9224673 | Packages for semiconductor devices, packaged semiconductor devices, and methods of cooling packaged semiconductor devices | Kim Hong Chen, Wensen Hung, Szu-Po Huang | 2015-12-29 |
| 9190325 | TSV formation | Wen-Chih Chiou, Ku-Feng Yang | 2015-11-17 |
| 9184128 | 3DIC package and methods of forming the same | Wensen Hung, Szu-Po Huang, Kim Hong Chen | 2015-11-10 |
| 9159673 | Forming interconnect structures using pre-ink-printed sheets | Jung Cheng Ko, Chi-Chun Hsieh, Shang-Yun Hou, Wen-Chih Chiou, Chen-Hua Yu | 2015-10-13 |
| 9128123 | Interposer test structures and methods | Tzuan-Horng Liu, Chen-Hua Yu, Hsien-Pin Hu, Tzu-Yu Wang, Wei-Cheng Wu +1 more | 2015-09-08 |
| 9116203 | Testing of semiconductor chips with microbumps | Wei-Cheng Wu, Hsien-Pin Hu, Shang-Yun Hou, Chen-Hua Yu, Chao-Hsiang Yang | 2015-08-25 |
| 9099515 | Reconfigurable guide pin design for centering wafers having different sizes | Hsin Chang, Hsin-Yu Chen, Fang Wen Tsai, Jing-Cheng Lin, Wen-Chih Chiou +1 more | 2015-08-04 |
| 9082743 | 3DIC packages with heat dissipation structures | Wensen Hung, Szu-Po Huang, Kim Hong Chen | 2015-07-14 |
| 9076754 | 3DIC packages with heat sinks attached to heat dissipating rings | Wensen Hung, Szu-Po Huang, Kim Hong Chen | 2015-07-07 |
| 9064879 | Packaging methods and structures using a die attach film | Jui-Pin Hung, Jing-Cheng Lin, Nai-Wei Liu, Chin-Chuan Chang, Chen-Hua Yu +3 more | 2015-06-23 |
| 9064705 | Methods and apparatus of packaging with interposers | Chung-Yu Lu, Hsien-Pin Hu, Hsiao-Tsung Yen, Tzuan-Horng Liu, Shih-Wen Huang +1 more | 2015-06-23 |
| 9054166 | Through silicon via keep out zone formation method and system | Cheng-Chieh Hsieh, Hung-An Teng, Shang-Yun Hou | 2015-06-09 |
| 9048233 | Package systems having interposers | Wei-Cheng Wu, Shang-Yun Hou, Chen-Hua Yu | 2015-06-02 |
| 9048231 | 3D packages and methods for forming the same | Shang-Yun Hou, Sao-Ling Chiu, Ping-Kang Huang, Wen-Hsin Wei, Wen-Chih Chiou +1 more | 2015-06-02 |
| 9034695 | Integrated thermal solutions for packaging integrated circuits | Cheng-Chieh Hsieh, Shang-Yun Hou | 2015-05-19 |
| 9023266 | Semiconductor molding chamber | Jing-Cheng Lin, Wen-Chih Chiou, Chen-Hua Yu | 2015-05-05 |
| 9024438 | Self-aligning conductive bump structure and method of making the same | Cheng-Lin Huang, I-Ting Chen, Ying-Ching Shih, Po-Hao Tsai, Szu-Wei Lu +2 more | 2015-05-05 |
| 8994188 | Interconnect structures for substrate | Chen-Hua Yu, Wen-Chih Chiou, Tsang-Jiuh Wu | 2015-03-31 |
| 8993432 | Test structure and method of testing electrical characteristics of through vias | Shang-Yun Hou, Wei-Cheng Wu, Hsien-Pin Hu, Jung Cheng Ko, Chen-Hua Yu +1 more | 2015-03-31 |
| 8993355 | Test line placement to improve die sawing quality | Hao-Yi Tsai, Chia-Lun Tsai, Shang-Yun Hou, Shih-Hsun Hsu, Wei-Ti Hsu +2 more | 2015-03-31 |
| 8993380 | Structure and method for 3D IC package | Shang-Yun Hou, Der-Chyang Yeh, Chen-Hua Yu | 2015-03-31 |
| 8981580 | Bond pad structure | Yu-Wen Liu, Hao-Yi Tsai, Hsien-Wei Chen | 2015-03-17 |
| 8963334 | Die-to-die gap control for semiconductor structure and method | Jing-Cheng Lin, Szu-Wei Lu, Ying-Ching Shih, Ying-Da Wang, Li-Chung Kuo +2 more | 2015-02-24 |