Issued Patents 2017
Showing 1–25 of 68 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9850126 | Integrated circuit package and method of forming same | Kuo Lung Pan, Hao-Yi Tsai, Yu-Feng Chen, Yu-Jen Cheng | 2017-12-26 |
| 9852985 | Conductive terminal on integrated circuit | Yu-Chia Lai, Chen-Hua Yu, Chang-Pin Huang, Hsien-Ming Tu, Hung-Yi Kuo +3 more | 2017-12-26 |
| 9847317 | Methods of packaging semiconductor devices and packaged semiconductor devices | Chen-Hua Yu, Meng-Tse Chen, Hui-Min Huang, Chih-Fan Huang, Ming-Da Cheng | 2017-12-19 |
| 9842815 | Semiconductor device and method of manufacture | Chen-Hua Yu, Tin-Hao Kuo, Hao-Yi Tsai | 2017-12-12 |
| 9842790 | Conductive line system and process | Yu Yi Huang, Hung-Jui Kuo | 2017-12-12 |
| 9837278 | Wafer level chip scale package and method of manufacturing the same | Yu-Hsiang Hu, Wei-Yu Chen, Hung-Jui Kuo, Wei-Hung Lin, Ming-Da Cheng | 2017-12-05 |
| 9824902 | Integrated fan-out package and method of fabricating the same | Hao-Cheng Hou, Chien-Hsun Lee, Chen-Hua Yu, Jung Wei Cheng, Ping-Kang Huang +2 more | 2017-11-21 |
| 9818729 | Package-on-package structure and method | Sheng-Hsiang Chiu, Meng-Tse Chen, Ching-Hua Hsieh, Sheng-Feng Weng, Ming-Da Cheng | 2017-11-14 |
| 9812427 | Package on-package (PoP) structure including stud bulbs | Chen-Hua Yu, Mirng-Ji Lii, Ming-Da Cheng | 2017-11-07 |
| 9802349 | Wafer level transfer molding and apparatus for performing the same | Bor-Ping Jang, Yeong-Jyh Lin, Chien Ling Hwang, Meng-Tse Chen, Ming-Da Cheng +1 more | 2017-10-31 |
| 9799615 | Package structures having height-adjusted molding members and methods of forming the same | Chang-Pin Huang, Hsien-Ming Tu, Hung-Yi Kuo, Hao-Yi Tsai, Shih-Wei Liang +2 more | 2017-10-24 |
| 9799625 | Semiconductor structure and manufacturing method thereof | Alexander Kalnitsky, Yi-Yang Lei, Hsi-Ching Wang, Cheng-Yu Kuo, Tsung Lung Huang +9 more | 2017-10-24 |
| 9799631 | Semiconductor packaging structure and method | Chun-Cheng Lin, Kuei-Wei Huang, Cheng-Ting Chen, Wei-Hung Lin, Ming-Da Cheng | 2017-10-24 |
| 9793140 | Staggered via redistribution layer (RDL) for a package and a method for forming the same | Chen-Hua Yu, Hung-Jui Kuo | 2017-10-17 |
| 9786618 | Semiconductor structure and manufacturing method thereof | Chang-Pin Huang, Hsien-Ming Tu, Ching-Jung Yang, Shih-Wei Liang, Hung-Yi Kuo +3 more | 2017-10-10 |
| 9786617 | Chip packages and methods of manufacture thereof | Zi-Jheng Liu, Chen-Cheng Kuo, Hung-Jui Kuo, Yu-Hsiang Hu | 2017-10-10 |
| 9786631 | Device package with reduced thickness and method for forming same | Chen-Hua Yu, Meng-Tse Chen, Ming-Da Cheng | 2017-10-10 |
| 9786622 | Semiconductor package | Ming-Da Cheng, Chih-Wei Lin, Kuei-Wei Huang, Yu-Peng Tsai, Chun-Cheng Lin | 2017-10-10 |
| 9780064 | Method of forming package assembly | Hung-Jen Lin, Tsung-Ding Wang, Chien-Hsiun Lee, Wen-Hsiung Lu, Ming-Da Cheng | 2017-10-03 |
| 9768137 | Stud bump structure for semiconductor package assemblies | Meng-Tse Chen, Hsiu-Jen Lin, Chih-Wei Lin, Cheng-Ting Chen, Ming-Da Cheng | 2017-09-19 |
| 9765289 | Cleaning methods and compositions | Hui-Jung Tsai, Hung-Jui Kuo | 2017-09-19 |
| 9768048 | Package on-package structure | Chih-Wei Lin, Hui-Min Huang, Ai-Tee Ang, Yu-Peng Tsai, Ming-Da Cheng | 2017-09-19 |
| 9768142 | Mechanisms for forming bonding structures | Yeong-Jyh Lin, Hsin-Hung Liao, Chien Ling Hwang, Bor-Ping Jang, Hsiao-Chung Liang | 2017-09-19 |
| 9768136 | Interconnect structure and method of fabricating same | Wen-Hsiung Lu, Wei-Yu Chen, Hsuan-Ting Kuo, Ming-Da Cheng | 2017-09-19 |
| 9761551 | Solder joint structure for ball grid array in wafer level package | Yu-Hsiang Hu, Wei-Yu Chen, Wei-Hung Lin, Ming-Da Cheng | 2017-09-12 |