Issued Patents 2017
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9842815 | Semiconductor device and method of manufacture | Chen-Hua Yu, Chung-Shi Liu, Hao-Yi Tsai | 2017-12-12 |
| 9824992 | Bump structure having a side recess and semiconductor structure including the same | Chih-Horng Chang, Chen-Shien Chen, Yen-Liang Lin | 2017-11-21 |
| 9812405 | Semiconductor package and manufacturing method of the same | Guan-Yu Chen, Yu-Wei Lin, Chen-Shien Chen | 2017-11-07 |
| 9711477 | Dummy flip chip bumps for reducing stress | Sheng-Yu Wu, Chita Chuang, Chen-Shien Chen | 2017-07-18 |
| 9679862 | Semiconductor device having conductive bumps of varying heights | Yen-Liang Lin, Sheng-Yu Wu, Chen-Shien Chen | 2017-06-13 |
| 9659896 | Interconnect structures for wafer level package and methods of forming same | Chih-Hao Chang, Tsung-Hsien Chiang, Guan-Yu Chen, Wei Sen Chang, Hao-Yi Tsai +1 more | 2017-05-23 |
| 9646923 | Semiconductor devices, methods of manufacture thereof, and packaged semiconductor devices | Yu-Jen Tseng, Yen-Liang Lin, Chen-Shien Chen, Mirng-Ji Lii | 2017-05-09 |
| 9633965 | Semiconductor structure and manufacturing method of the same | Yen-Liang Lin, Mirng-Ji Lii, Chen-Shien Chen, Yu-Feng Chen, Sheng-Yu Wu | 2017-04-25 |
| 9620465 | Dual-sided integrated fan-out package | Kuo Lung Pan, Wei Sen Chang, Hao-Yi Tsai, Chung-Shi Liu | 2017-04-11 |
| 9583367 | Methods and apparatus for bump-on-trace chip packaging | Chang-Chia Huang, Chen-Shien Chen, Sheng-Yu Wu, Yen-Liang Lin | 2017-02-28 |
| 9559069 | Semiconductor device, integrated circuit structure using the same, and manufacturing method thereof | Yu-Feng Chen, Chen-Shien Chen, Sheng-Yu Wu, Yen-Liang Lin | 2017-01-31 |
| 9548245 | Isolation rings for packages and the method of forming the same | Chih-Horng Chang, Tsung-Fu Tsai, Min-Feng Ku | 2017-01-17 |