PF

Paul B. Fischer

IN Intel: 110 patents #170 of 30,777Top 1%
📍 Portland, OR: #103 of 9,213 inventorsTop 2%
🗺 Oregon: #178 of 28,073 inventorsTop 1%
Overall (All Time): #11,922 of 4,157,543Top 1%
110
Patents All Time

Issued Patents All Time

Showing 76–100 of 110 patents

Patent #TitleCo-InventorsDate
10763248 Multi-layer silicon/gallium nitride semiconductor Sansaptak Dasgupta, Marko Radosavljevic, Han Wui Then, Ravi Pillarisetty, Kimin Jun +3 more 2020-09-01
10720345 Wafer to wafer bonding with low wafer distortion Mauro J. Kobrinsky, Myra McDonnell, Brennen Mueller, Chytra Pawashe, Daniel Pantuso +2 more 2020-07-21
10714446 Apparatus with multi-wafer based device comprising embedded active and/or passive devices and method for forming such Anup Pancholi, Prashant Majhi, Patrick Morrow 2020-07-14
10673405 Film bulk acoustic resonator (FBAR) devices with 2DEG bottom electrode Sansaptak Dasgupta, Marko Radosavljevic, Han Wui Then, Bruce A. Block 2020-06-02
10672884 Schottky diodes on semipolar planes of group III-N material structures Sansaptak Dasgupta, Marko Radosavljevic, Han Wui Then 2020-06-02
10658475 Transistors with vertically opposed source and drain metal interconnect layers Han Wui Then, Sansaptak Dasgupta, Marko Radosavljevic 2020-05-19
10627427 Manufacturing advanced test probes Roy E. Swart, Charlotte C. Kwong 2020-04-21
10573715 Backside isolation for integrated circuit Aaron D. Lilak, Rishabh Mehandru, Harold W. Kennel, Stephen M. Cea 2020-02-25
10529827 Long channel MOS transistors for low leakage applications on a short channel CMOS chip Rishabh Mehandru, Patrick Morrow, Aaron D. Lilak, Stephen M. Cea 2020-01-07
10522510 Heterogeneous integration of ultrathin functional block by solid phase adhesive and selective transfer Kimin Jun, Jacob Jensen, Patrick Morrow 2019-12-31
10490449 Techniques for revealing a backside of an integrated circuit device, and associated configurations Il-Seok Son, Colin T. Carver, Patrick Morrow, Kimin Jun 2019-11-26
10453679 Methods and devices integrating III-N transistor circuitry with Si transistor circuitry Sansaptak Dasgupta, Marko Radosavljevic, Han Wui Then, Ravi Pillarisetty, Kimin Jun +3 more 2019-10-22
10396045 Metal on both sides of the transistor integrated with magnetic inductors Patrick Morrow 2019-08-27
10367070 Methods of forming backside self-aligned vias and structures formed thereby Patrick Morrow, Mauro J. Kobrinsky, Kimin Jun, Il-Seok Son 2019-07-30
10236282 Partial layer transfer system and method Patrick Morrow, Kimin Jun, Il-Seok Son, Rajashree Baskaran 2019-03-19
9921640 Integrated voltage regulators with magnetically enhanced inductors Uwe Zillmann, Andre Schaefer, Ruchir Saraswat, Telesphor Kamgaing, Guido Droege 2018-03-20
9835648 Liquid metal interconnects Rajashree Baskaran, Kimin Jun, Ting Zhong, Roy E. Swart 2017-12-05
9786559 Process and material for preventing deleterious expansion of high aspect ratio copper filled through silicon vias (TSVs) Paul A. Zimmerman, Scott B. Clendenning, Patricio E. Romero, Robert Edgeworth 2017-10-10
9461010 Debond interconnect structures Qing Ma, Jun He, Patrick Morrow, Sridhar Balakrishnan, Satish Radhakrishnan +2 more 2016-10-04
9391447 Interposer to regulate current for wafer test tooling Evan M. Fledell, Roy E. Swart, Timothy J. Maloney, Jack D. Pippin 2016-07-12
9269686 Debond interconnect structures Qing Ma, Jun He, Patrick Morrow, Sridhar Balakrishnan, Satish Radhakrishnan +2 more 2016-02-23
9177831 Die assembly on thin dielectric sheet Chia-Pin Chiu, Qing Ma, Robert L. Sankman, Patrick Morrow, William J. Lambert +2 more 2015-11-03
8637778 Debond interconnect structures Qing Ma, Jun He, Patrick Morrow, Sridhar Balakrishnan, Satish Radhakrishnan +2 more 2014-01-28
8513966 Probes formed from semiconductor region vias Qing Ma, Roy E. Swart, Johanna M. Swan 2013-08-20
7666465 Introducing nanotubes in trenches and structures formed thereby Anne Miller, Kenneth Cadien, Chris Barns 2010-02-23