Patent Leaderboard
USPTO Patent Rankings Data through Sept 30, 2025
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Patrick Morrow

INIntel: 186 patents #69 of 30,777Top 1%
INIntle: 1 patents #1 of 16Top 7%
Portland, OR: #32 of 9,213 inventorsTop 1%
Oregon: #67 of 28,073 inventorsTop 1%
Overall (All Time): #3,872 of 4,157,543Top 1%
187 Patents All Time

Issued Patents All Time

Showing 101–125 of 187 patents

Patent #TitleCo-InventorsDate
10998302 Packaged device with a chiplet comprising memory resources Adel A. Elsherbini, Van H. Le, Johanna M. Swan, Shawna M. Liff, Gerald Pasdast +1 more 2021-05-04
10978590 Methods and apparatus to remove epitaxial defects in semiconductors Aaron D. Lilak, Rishabh Mehandru, Patrick H. Keys 2021-04-13
10944399 Multi-level spin logic Sasikanth Manipatruni, Ian A. Young, Dmitri E. Nikonov, Uygar E. Avci, Anurag Chaudhry 2021-03-09
10937665 Methods and apparatus for gettering impurities in semiconductors Aaron D. Lilak, Harold W. Kennel, Rishabh Mehandru, Stephen M. Cea 2021-03-02
10910405 Backside fin recess control with multi-HSI option Aaron D. Lilak, Stephen M. Cea, Rishabh Mehandru, Cory E. Weber 2021-02-02
10896847 Techniques for revealing a backside of an integrated circuit device, and associated configurations Il-Seok Son, Colin T. Carver, Paul B. Fischer, Kimin Jun 2021-01-19
10892337 Backside source/drain replacement for semiconductor devices with metallization on both sides Glenn A. Glass, Karthik Jambunathan, Anand S. Murthy, Chandra S. Mohapatra, Mauro J. Kobrinsky 2021-01-12
10892215 Metal on both sides with power distributed through the silicon Donald W. Nelson, Mark Bohr 2021-01-12
10886217 Integrated circuit device with back-side interconnection to deep source/drain semiconductor Mauro J. Kobrinsky, Mark Bohr, Tahir Ghani, Rishabh Mehandru 2021-01-05
10872820 Integrated circuit structures Bruce A. Block, Valluri Rao, Rishabh Mehandru, Doug B. Ingerly, Kimin Jun +3 more 2020-12-22
10861870 Inverted staircase contact for density improvement to 3D stacked devices Aaron D. Lilak, Rishabh Mehandru 2020-12-08
10847635 Vertical integration scheme and circuit elements architecture for area scaling of semiconductor devices Rishabh Mehandru, Ranjith Kumar, Cory E. Weber, Seiyon Kim, Stephen M. Cea +1 more 2020-11-24
10797139 Methods of forming backside self-aligned vias and structures formed thereby Mauro J. Kobrinsky, Kimin Jun, Il-Seok Son, Paul B. Fischer 2020-10-06
10784358 Backside contact structures and fabrication for metal on both sides of devices Rishabh Mehandru, Aaron D. Lilak, Kimin Jun 2020-09-22
10763248 Multi-layer silicon/gallium nitride semiconductor Sansaptak Dasgupta, Marko Radosavljevic, Han Wui Then, Ravi Pillarisetty, Kimin Jun +3 more 2020-09-01
10734412 Backside contact resistance reduction for semiconductor devices with metallization on both sides Glenn A. Glass, Anand S. Murthy, Karthik Jambunathan, Chandra S. Mohapatra, Mauro J. Kobrinsky 2020-08-04
10714446 Apparatus with multi-wafer based device comprising embedded active and/or passive devices and method for forming such Anup Pancholi, Prashant Majhi, Paul B. Fischer 2020-07-14
10700039 Silicon die with integrated high voltage devices Donald W. Nelson, M. Clair Webb, Kimin Jun 2020-06-30
10672831 High density memory architecture using back side metal layers Yih Wang 2020-06-02
10658291 Metal on both sides with clock gated-power and signal routing underneath Donald W. Nelson, Kimin Jun 2020-05-19
10636907 Deep EPI enabled by backside reveal for stress enhancement and contact Aaron D. Lilak, Stephen M. Cea, Rishabh Mehandru, Patrick H. Keys 2020-04-28
10600810 Backside fin recess control with multi-hsi option Aaron D. Lilak, Stephen M. Cea, Rishabh Mehandru, Cory E. Weber 2020-03-24
10529827 Long channel MOS transistors for low leakage applications on a short channel CMOS chip Rishabh Mehandru, Paul B. Fischer, Aaron D. Lilak, Stephen M. Cea 2020-01-07
10522510 Heterogeneous integration of ultrathin functional block by solid phase adhesive and selective transfer Kimin Jun, Jacob Jensen, Paul B. Fischer 2019-12-31
10490542 Integrated circuit layout using library cells with alternating conductive lines Donald W. Nelson, Steven M. Burns 2019-11-26