Issued Patents All Time
Showing 301–325 of 584 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8159067 | Underfill flow guide structures | Timothy H. Daubenspeck, Christopher D. Muzzy, Marie-Claude Paquet, Wolfgang Sauter, Timothy D. Sullivan | 2012-04-17 |
| 8158988 | Interlevel conductive light shield | Zhong-Xiang He, Kevin N. Ogg, Richard J. Rassel, Robert M. Rassel | 2012-04-17 |
| 8138534 | Anti-reflection structures for CMOS image sensors | James W. Adkisson, John J. Ellis-Monaghan, Charles F. Musante | 2012-03-20 |
| 8138099 | Chip package solder interconnect formed by surface tension | Timothy H. Daubenspeck, Christopher D. Muzzy, Wolfgang Sauter, Timothy D. Sullivan | 2012-03-20 |
| 8137791 | Fuse and pad stress relief | Felix P. Anderson, Thomas L. McDevitt, Anthony K. Stamper | 2012-03-20 |
| 8129286 | Reducing effective dielectric constant in semiconductor devices | Daniel C. Edelstein, Matthew E. Colburn, Edward C. Cooney, III, Timothy J. Dalton, John A. Fitzsimmons +10 more | 2012-03-06 |
| 8120143 | Integrated circuit comb capacitor | Daniel C. Edelstein, Anil K. Chinthakindi, Timothy J. Dalton, Ebenezer E. Eshun, Sarah L. Lane +1 more | 2012-02-21 |
| 8120141 | Method and structure to prevent circuit network charging during fabrication of integrated circuits | Kirk D. Peterson | 2012-02-21 |
| 8119522 | Method of fabricating damascene structures | Peter J. Lindgren, Anthony K. Stamper | 2012-02-21 |
| 8119491 | Methods of fabricating passive element without planarizing and related semiconductor device | Anil K. Chinthakindi, Timothy J. Dalton, Ebenezer E. Eshun, Anthony K. Stamper, Kunal Vaed | 2012-02-21 |
| 8119456 | Bond pad for wafer and package for CMOS imager | James W. Adkisson, Mark D. Jaffe, Richard L. Rassel | 2012-02-21 |
| 8114750 | Lateral diffusion field effect transistor with drain region self-aligned to gate electrode | Natalie B. Feilchenfeld, Xuefeng Liu, Benjamin T. Voegeli, Steven H. Voldman, Michael J. Zierak | 2012-02-14 |
| 8114767 | Structure, semiconductor structure and method of manufacturing a semiconductor structure and packaging thereof | Timothy H. Daubenspeck, Christopher D. Muzzy, Wolfgang Sauter, Jeffrey S. Zimmerman | 2012-02-14 |
| 8110875 | Structure for charge dissipation during fabrication of integrated circuits and isolation thereof | John J. Ellis-Monaghan, Timothy D. Sullivan, Steven H. Voldman | 2012-02-07 |
| 8106513 | Copper damascene and dual damascene interconnect wiring | William R. Hill, Kenneth E. McAvey, Jr., Thomas L. McDevitt, Anthony K. Stamper, Arthur C. Winslow +1 more | 2012-01-31 |
| 8089105 | Fuse link structures using film stress for programming and methods of manufacture | Karl W. Barth, Tom C. Lee, Kevin S. Petrarca | 2012-01-03 |
| 8053814 | On-chip embedded thermal antenna for chip cooling | Fen Chen, Alvin W. Strong | 2011-11-08 |
| 8053901 | Sacrificial inorganic polymer intermetal dielectric damascene wire and via liner | Anthony K. Stamper | 2011-11-08 |
| 8039888 | Conductive spacers for semiconductor devices and methods of forming | Gary B. Bronner, David M. Fried, Leland Chang, Ramachandra Divakaruni, Haizhou Yin +2 more | 2011-10-18 |
| 8021950 | Semiconductor wafer processing method that allows device regions to be selectively annealed following back end of the line (BEOL) metal wiring layer formation | Wagdi W. Abadeer, John J. Ellis-Monaghan, Tom C. Lee | 2011-09-20 |
| 8017997 | Vertical metal-insulator-metal (MIM) capacitor using gate stack, gate spacer and contact via | Ramachandra Divakaruni, Mukta G. Farooq, Kevin S. Petrarca | 2011-09-13 |
| 8017514 | Optically transparent wires for secure circuits and methods of making same | Stephen P. Ayotte, Timothy D. Sullivan, Kimball M. Watson | 2011-09-13 |
| 8017995 | Deep trench semiconductor structure and method | Benjamin T. Voegeli, Steven H. Voldman, Michael J. Zierak | 2011-09-13 |
| 8013342 | Double-sided integrated circuit chips | Kerry Bernstein, Timothy J. Dalton, Mark D. Jaffe, Paul D. Kartschoke, Stephen E. Luce +1 more | 2011-09-06 |
| 8004289 | Wafer-to-wafer alignments | Thomas Joseph Dalton, Mark D. Jaffe, Stephen E. Luce, Edmund J. Sprogis | 2011-08-23 |