JZ

Jeffrey S. Zimmerman

IBM: 17 patents #6,502 of 70,183Top 10%
AL Alliedsignal: 1 patents #1,187 of 2,631Top 50%
📍 Swanton, VT: #1 of 29 inventorsTop 4%
🗺 Vermont: #431 of 4,968 inventorsTop 9%
Overall (All Time): #256,037 of 4,157,543Top 7%
18
Patents All Time

Issued Patents All Time

Showing 1–18 of 18 patents

Patent #TitleCo-InventorsDate
10101388 Method for enhanced semiconductor product diagnostic fail signature detection Robert C. Redburn, Andrew A. Turner 2018-10-16
9000585 Structure, semiconductor structure and method of manufacturing a semiconductor structure and packaging thereof Timothy H. Daubenspeck, Jeffrey P. Gambino, Christopher D. Muzzy, Wolfgang Sauter 2015-04-07
8990478 Protection of one-time programmable (OTP) memory John A. Fifield, Gerald P. Pomichter, Jr. 2015-03-24
8114767 Structure, semiconductor structure and method of manufacturing a semiconductor structure and packaging thereof Timothy H. Daubenspeck, Jeffrey P. Gambino, Christopher D. Muzzy, Wolfgang Sauter 2012-02-14
7958477 Structure, failure analysis tool and method of determining white bump location using failure analysis tool Timothy H. Daubenspeck, Jeffrey P. Gambino, Christopher D. Muzzy, Wolfgang Sauter 2011-06-07
7716992 Sensor, method, and design structure for a low-k delamination sensor John J. Maloney, Wolfgang Sauter, Thomas A. Wassick 2010-05-18
7712057 Determining allowance antenna area as function of total gate insulator area for SOI technology Henry A. Bonges, III, Terence B. Hook, William F. Pokorny 2010-05-04
7649262 Suppression of localized metal precipitate formation and corresponding metallization depletion in semiconductor processing Jonathan D. Chapple-Sokol, Terence B. Hook, Baozhen Li, Thomas L. McDevitt, Christopher A. Ponsolle +2 more 2010-01-19
7572650 Suppression of localized metal precipitate formation and corresponding metallization depletion in semiconductor processing Jonathan D. Chapple-Sokol, Terence B. Hook, Baozhen Li, Thomas L. McDevitt, Christopher A. Ponsolle +2 more 2009-08-11
7560345 Method of assessing potential for charging damage in integrated circuit designs and structures for preventing charging damage Terence B. Hook 2009-07-14
7232695 Method and apparatus for completely covering a wafer with a passivating material Timothy H. Daubenspeck, Jeffrey P. Gambino, Christopher D. Muzzy, Wolfgang Sauter 2007-06-19
7173338 Suppression of localized metal precipitate formation and corresponding metallization depletion in semiconductor processing Jonathan D. Chapple-Sokol, Terence B. Hook, Baozhen Li, Thomas L. McDevitt, Christopher A. Ponsolle +2 more 2007-02-06
6949796 Halo implant in semiconductor structures John J. Ellis-Monaghan, Kirk D. Peterson 2005-09-27
6937965 Statistical guardband methodology Mark R. Bilak, Joseph M. Forbes, Curt Guenther, Michael J. Maloney, Michael D. Maurice +2 more 2005-08-30
6226976 Variable fuel heating value adaptive control for gas turbine engines Michael Scott 2001-05-08
6097207 Robust domino circuit design for high stress conditions Kerry Bernstein, Norman J. Rohrer 2000-08-01
5633605 Dynamic bus with singular central precharge John A. Fifield, Christopher P. Miller, Robert E. Busch 1997-05-27
5625631 Pass through mode for multi-chip-module die George W. Rohrbaugh, III 1997-04-29