| 11989071 |
Dynamic guard band with timing protection and with performance protection |
Tobias Webel, Alejandro Alberto Cook Lobo, Christian Jacobi, Eberhard Engler, Edward C. McCain +12 more |
2024-05-21 |
| 11953982 |
Dynamic guard band with timing protection and with performance protection |
Alejandro Alberto Cook Lobo, Christian Jacobi, Eberhard Engler, Edward C. McCain, Kevin P. Low +10 more |
2024-04-09 |
| 11226372 |
Portable chip tester with integrated field programmable gate array |
Noah Singer, Daniele Di Genova, John G. Torok, Gary W. Maier, Richard W. Oldrey |
2022-01-18 |
| 11169841 |
Tunable power save loop for processor chips |
K Paul Muller, William V. Huott, Eberhard Engler, Christopher R. Conklin, Stephanie Lehrer |
2021-11-09 |
| 11146251 |
Performance-screen ring oscillator with switchable features |
John Bradley Deforge, Kirk D. Peterson, Theresa A. Newton, Terence B. Hook |
2021-10-12 |
| 10768226 |
Testing mechanism for a proximity fail probability of defects across integrated chips |
Kirk D. Peterson, Alain G. Rwabukamba |
2020-09-08 |
| 10726178 |
Functional logic cone signature generation for circuit analysis |
Nicholai L'Esperance, Adisun Wheelock, Robert C. Redburn |
2020-07-28 |
| 10215804 |
Semiconductor power and performance optimization |
Sean Michael Carey, Kirk D. Peterson |
2019-02-26 |
| 10114071 |
Testing mechanism for a proximity fail probability of defects across integrated chips |
Kirk D. Peterson, Alain G. Rwabukamba |
2018-10-30 |
| 10101388 |
Method for enhanced semiconductor product diagnostic fail signature detection |
Robert C. Redburn, Jeffrey S. Zimmerman |
2018-10-16 |
| 9921264 |
Method and apparatus for offline supported adaptive testing |
Hunter Feng Shi |
2018-03-20 |
| 9733307 |
Optimized chain diagnostic fail isolation |
Gerard M. Salem |
2017-08-15 |
| 9712112 |
Dynamic noise mitigation in integrated circuit devices using local clock buffers |
Miles C. Pedrone, Kirk D. Peterson, John E. Sheets, II |
2017-07-18 |
| 9588177 |
Optimizing generation of test configurations for built-in self-testing |
Eugene Atwood, Mary P. Kusko, Paul Jacob Logsdon, Franco Motika |
2017-03-07 |
| 9575115 |
Methodology of grading reliability and performance of chips across wafer |
Nathaniel R. Chadwick, James P. Di Sarro, Robert J. Gauthier, Jr., Tom C. Lee, Junjun Li +2 more |
2017-02-21 |
| 9557381 |
Physically aware insertion of diagnostic circuit elements |
William V. Huott, Mary P. Kusko, Sridhar H. Rangarajan, Robert C. Redburn |
2017-01-31 |
| 9214427 |
Method of self-correcting power grid for semiconductor structures |
Cathryn J. Christiansen, Andrew H. Norfleet, Kirk D. Peterson |
2015-12-15 |
| 9087841 |
Self-correcting power grid for semiconductor structures method |
Cathryn J. Christiansen, Andrew H. Norfleet, Kirk D. Peterson |
2015-07-21 |
| 9008196 |
Updating interface settings for an interface |
Frank W. Angelotti, Michael Campbell, Kenneth L. Christian, Martin Eckert, Hubert Harrer +4 more |
2015-04-14 |
| 8860113 |
Creating deep trenches on underlying substrate |
Jennifer E. Appleyard, John E. Barth, Jr., John Bradley Deforge, Herbert L. Ho, Babar A. Khan +1 more |
2014-10-14 |
| 8586444 |
Creating deep trenches on underlying substrate |
Jennifer E. Appleyard, John E. Barth, Jr., John Bradley Deforge, Herbert L. Ho, Babar A. Khan +1 more |
2013-11-19 |
