Issued Patents All Time
Showing 26–50 of 173 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11322588 | Contact source/drain resistance | Choonghyun Lee, Kangguo Cheng, Hemanth Jagannathan, Oleg Gluschenkov | 2022-05-03 |
| 11239316 | Semiconductor device and method of forming the semiconductor device | Marc A. Bergendahl, Gauri Karve, Eric R. Miller, Robert R. Robison, John R. Sporre +1 more | 2022-02-01 |
| 11189532 | Dual width finned semiconductor structure | Yi Song, Jay William Strane, Eric R. Miller, Richard A. Conti | 2021-11-30 |
| 11127815 | Semiconductor device and method of forming the semiconductor device | Marc A. Bergendahl, Gauri Karve, Eric R. Miller, Robert R. Robison, John R. Sporre +1 more | 2021-09-21 |
| 11081424 | Micro-fluidic channels having various critical dimensions | Ravi K. Bonam, Kamal K. Sikka, Joshua M. Rubin, Iqbal Rashid Saraf | 2021-08-03 |
| 11079337 | Secure wafer inspection and identification | Effendi Leobandung, Richard C. Johnson, Scott D. Halle, Robin Hsin Kuo Chao | 2021-08-03 |
| 11075299 | Transistor gate having tapered segments positioned above the fin channel | Eric R. Miller, Gauri Karve, Marc A. Bergendahl, Kangguo Cheng, Sean Teehan | 2021-07-27 |
| 11062911 | Two-color self-aligned double patterning (SADP) to yield static random access memory (SRAM) and dense logic | Dongbing Shao, Robert C. Wong, Yongan Xu | 2021-07-13 |
| 11056418 | Semiconductor microcooler | Donald F. Canaperi, Daniel A. Corliss, Dario L. Goldfarb, Dinesh Gupta, Kamal K. Sikka | 2021-07-06 |
| 11049789 | Semiconductor microcooler | Donald F. Canaperi, Daniel A. Corliss, Dario L. Goldfarb, Dinesh Gupta, Kamal K. Sikka | 2021-06-29 |
| 11043581 | Nanosheet channel-to-source and drain isolation | Marc A. Bergendahl, Kangguo Cheng, Eric R. Miller, John R. Sporre, Sean Teehan | 2021-06-22 |
| 11043494 | Structure and method for equal substrate to channel height between N and P fin-FETs | Lawrence A. Clevenger, Leigh Anne H. Clevenger, Mona A. Ebrish, Gauri Karve, Deepika Priyadarshini +2 more | 2021-06-22 |
| 11031346 | Advanced wafer security method including pattern and wafer verifications | Effendi Leobandung, Carol Boye, Shravan Kumar Matham, Brad Austin | 2021-06-08 |
| 10937867 | Conformal doping for punch through stopper in fin field effect transistor devices | Huiming Bu, Sivananda K. Kanakasabapathy, Tenko Yamashita | 2021-03-02 |
| 10937810 | Sub-fin removal for SOI like isolation with uniform active fin height | Marc A. Bergendahl, Kangguo Cheng, Gauri Karve, Eric R. Miller, John R. Sporre +1 more | 2021-03-02 |
| 10937764 | Three-dimensional microelectronic package with embedded cooling channels | Kamal K. Sikka, Kevin R. Winstel, Ravi K. Bonam, Iqbal Rashid Saraf, Dario L. Goldfarb +2 more | 2021-03-02 |
| 10886271 | Fabrication of fin field effect transistors for complementary metal oxide semiconductor devices including separate n-type and p-type source/drains using a single spacer deposition | Kangguo Cheng, Eric R. Miller, Sean Teehan | 2021-01-05 |
| 10833190 | Super long channel device within VFET architecture | Marc A. Bergendahl, Kangguo Cheng, Gauri Karve, Eric R. Miller, John R. Sporre +1 more | 2020-11-10 |
| 10832945 | Techniques to improve critical dimension width and depth uniformity between features with different layout densities | Nicole Saulnier, Indira Seshadri, Lawrence A. Clevenger, Leigh Anne H. Clevenger, Gauri Karve +3 more | 2020-11-10 |
| 10833010 | Integration of artificial intelligence devices | Hsueh-Chung Chen, Lawrence A. Clevenger, Effendi Leobandung | 2020-11-10 |
| 10818663 | Fabrication of fin field effect transistors for complementary metal oxide semiconductor devices including separate n-type and p-type source/drains using a single spacer deposition | Kangguo Cheng, Eric R. Miller, Sean Teehan | 2020-10-27 |
| 10818751 | Nanosheet transistor barrier for electrically isolating the substrate from the source or drain regions | Mona A. Ebrish, Nicolas Loubet, Gauri Karve, Indira Seshadri, Lawrence A. Clevenger +1 more | 2020-10-27 |
| 10811508 | Vertical transistors having multiple gate thicknesses for optimizing performance and device density | Brent A. Anderson, Stuart A. Sieg, Junli Wang | 2020-10-20 |
| 10811507 | Vertical transistors having multiple gate thicknesses for optimizing performance and device density | Brent A. Anderson, Stuart A. Sieg, Junli Wang | 2020-10-20 |
| 10741673 | Controlling gate profile by inter-layer dielectric (ILD) nanolaminates | Michael P. Belyansky, Andrew M. Greene, Huimei Zhou | 2020-08-11 |