Issued Patents 2024
Showing 1–25 of 45 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12144065 | Warpage control in the packaging of integrated circuits | Hsiu-Jen Lin, Cheng-Ting Chen, Wei-Yu Chen, Chien-Wei Lee, Chung-Shi Liu | 2024-11-12 |
| 12142594 | Tools and systems for processing semiconductor devices, and methods of processing semiconductor devices | Kuei-Wei Huang, Hsiu-Jen Lin, Ai-Tee Ang, Chung-Shi Liu | 2024-11-12 |
| 12142582 | Organic interposer including a dual-layer inductor structure and methods of forming the same | Wei-Han Chiang, Chun-Hung Chen, Ching-Ho Cheng, Hsiao Ching-Wen, Hong-Seng Shue +1 more | 2024-11-12 |
| 12136644 | Process for tuning via profile in dielectric material | Chun-Kai Tzeng, Cheng-Jen Lin, Yung-Ching Chao, Mirng-Ji Lii | 2024-11-05 |
| 12134557 | Arched membrane structure for MEMS device | Jhao-Yi Wang, Chin-Yu Ku, Wen-Hsiung Lu, Lung-Kai Mao | 2024-11-05 |
| 12125797 | Package structure with fan-out feature | Shing-Chao Chen, Chih-Wei Lin, Tsung-Hsien Chiang, Ching-Hua Hsieh | 2024-10-22 |
| 12119229 | Method of manufacturing semiconductor structure | Yu-Hsiang Hu, Wei-Yu Chen, Hung-Jui Kuo, Wei-Hung Lin, Chung-Shi Liu | 2024-10-15 |
| 12120868 | Semiconductor device with buried bit line and preparation method thereof | Ran Li, Xing Jin | 2024-10-15 |
| 12119238 | Semiconductor bonding structures and methods | Meng-Tse Chen, Hsiu-Jen Lin, Wei-Hung Lin, Kuei-Wei Huang, Chung-Shi Liu | 2024-10-15 |
| 12107051 | Method of forming semiconductor packages having through package vias | Chen-Hua Yu, Chung-Shi Liu, Chih-Wei Lin | 2024-10-01 |
| 12096616 | Semiconductor structure and manufacturing method thereof | Xing Jin, Ran Li | 2024-09-17 |
| 12080653 | Formation method of chip package with fan-out structure | Shing-Chao Chen, Chih-Wei Lin, Tsung-Hsien Chiang, Ching-Hua Hsieh | 2024-09-03 |
| 12068303 | Package structure | Wei-Hung Lin, Hui-Min Huang, Chang-Jung Hsueh, Wan-Yu Chiang, Mirng-Ji Lii | 2024-08-20 |
| 12057423 | Bump integration with redistribution layer | Ting-Li Yang, Po-Hao Tsai, Ching-Wen Hsiao, Hong-Seng Shue | 2024-08-06 |
| 12051632 | Semiconductor package structure and method for forming semiconductor package structure | Po-Hao Tsai, Wei-Hung Lin, Mirng-Ji Lii | 2024-07-30 |
| 12051622 | Passivation layer and planarization layer and method of forming the same | Tzy-Kuang Lee, Hao-Chun Liu, Po-Hao Tsai, Chih-Hsien Lin, Ching-Wen Hsiao | 2024-07-30 |
| 12040289 | Interposer including a copper edge seal ring structure and methods of forming the same | Hong-Seng Shue, Ching-Wen Hsiao, Yao-Chun Chuang, Yu-Tse Su, Chen-Shien Chen | 2024-07-16 |
| 12040256 | Semiconductor device and method | Hsu-Lun Liu, Wen-Hsiung Lu, Chen-En Yen, Cheng-Lung Yang, Kuanchih Huang | 2024-07-16 |
| 12033883 | Fan-out interconnect structure and methods forming the same | Yu-Hsiang Hu, Chung-Shi Liu, Hung-Jui Kuo | 2024-07-09 |
| 12033870 | Bump structure and method of making the same | Wen-Hsiung Lu, Su-Fei Lin, Hsu-Lun Liu, Chien-Pin Chan, Yung-Sheng Lin | 2024-07-09 |
| 12027435 | Packages including multiple encapsulated substrate blocks and overlapping redistribution structures | Chen-Shien Chen, Kuo-Ching Hsu, Wei-Hung Lin, Hui-Min Huang, Mirng-Ji Lii | 2024-07-02 |
| 12021037 | Method for manufacturing package structure | Yi-Da Tsai, Cheng Ping Lin, Wei-Hung Lin, Chih-Wei Lin, Ching-Hua Hsieh +1 more | 2024-06-25 |
| 12015002 | Chip structure and method for forming the same | Hui-Min Huang, Wei-Hung Lin, Chang-Jung Hsueh, Kai Jun Zhan, Yung-Sheng Lin | 2024-06-18 |
| 12009345 | 3D package structure and methods of forming same | Meng-Tse Chen, Chung-Shi Liu, Chih-Wei Lin, Hui-Min Huang, Hsuan-Ting Kuo | 2024-06-11 |
| 12009322 | Package structure with through-via in molding compound and dielectric layer | Chih-Hsuan Tai, Ting-Ting Kuo, Yu-Chih Huang, Chih-Wei Lin, Hsiu-Jen Lin +4 more | 2024-06-11 |