Issued Patents 2024
Showing 1–24 of 24 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12176337 | Semiconductor devices and methods of manufacturing | Yi-Wen Wu, Po-Yao Chuang, Meng-Liang Lin, Techi Wong, Shih-Ting Hung +1 more | 2024-12-24 |
| 12132021 | Method for fabricating semiconductor package | Chia-Kuei Hsu, Ming-Chih Yew, Po-Yao Lin, Shin-Puu Jeng | 2024-10-29 |
| 12131984 | Heterogeneous fan-out structure and method of manufacture | Po-Yao Chuang, Shin-Puu Jeng, Techi Wong | 2024-10-29 |
| 12100666 | Method for forming chip package structure | Shin-Puu Jeng, Techi Wong, Po-Yao Lin, Ming-Chih Yew, Po-Yao Chuang | 2024-09-24 |
| 12094819 | Method for forming package structure | Techi Wong, Meng-Liang Lin, Yi-Wen Wu, Po-Yao Chuang, Shin-Puu Jeng | 2024-09-17 |
| 12087648 | Seal ring structure with zigzag patterns and method forming same | Kuan-Hung Chen, Hong-Seng Shue, Mirng-Ji Lii | 2024-09-10 |
| 12087745 | Package structure and manufacturing method thereof | Wei-Yu Chen, An-Jhih Su, Chi-Hsi Wu, Der-Chyang Yeh, Li-Hsien Huang +2 more | 2024-09-10 |
| 12074104 | Integrated circuit packages with ring-shaped substrates | Techi Wong, Meng-Wei Chou, Meng-Liang Lin, Po-Yao Chuang, Shin-Puu Jeng | 2024-08-27 |
| 12057432 | Integrated fan-out package structures with recesses in molding compound | Li-Hui Cheng, Jui-Pin Hung, Jing-Cheng Lin | 2024-08-06 |
| 12057423 | Bump integration with redistribution layer | Ting-Li Yang, Ching-Wen Hsiao, Hong-Seng Shue, Ming-Da Cheng | 2024-08-06 |
| 12051622 | Passivation layer and planarization layer and method of forming the same | Ming-Da Cheng, Tzy-Kuang Lee, Hao-Chun Liu, Chih-Hsien Lin, Ching-Wen Hsiao | 2024-07-30 |
| 12051632 | Semiconductor package structure and method for forming semiconductor package structure | Wei-Hung Lin, Ming-Da Cheng, Mirng-Ji Lii | 2024-07-30 |
| 12046548 | Chip package with redistribution structure having multiple chips | Shin-Puu Jeng, Po-Yao Chuang, Feng-Cheng Hsu, Shuo-Mao Chen, Techi Wong | 2024-07-23 |
| 12021045 | Semiconductor device and method of manufacture | Po-Yao Chuang, Ming-Chih Yew, Shin-Puu Jeng | 2024-06-25 |
| 11996606 | Heterogeneous antenna in fan-out package | Po-Yao Chuang, Shin-Puu Jeng | 2024-05-28 |
| 11996372 | Semiconductor device and method of manufacture | Po-Yao Chuang, Shin-Puu Jeng | 2024-05-28 |
| 11967579 | Method for forming package structure with cavity substrate | Ming-Da Cheng, Mirng-Ji Lii | 2024-04-23 |
| 11961762 | Package component with stepped passivation layer | Ming-Da Cheng, Tzy-Kuang Lee, Song-Bor Lee, Wen-Hsiung Lu, Wen-Che Chang | 2024-04-16 |
| 11955423 | Semiconductor device and method | Ting-Li Yang, Ming-Da Cheng, Yung-Han Chuang, Hsueh-Sheng Wang | 2024-04-09 |
| 11948892 | Formation method of chip package with fan-out feature | Meng-Liang Lin, Po-Yao Chuang, Techi Wong, Shin-Puu Jeng | 2024-04-02 |
| 11935866 | Semiconductor device having reduced bump height variation | Jing-Cheng Lin | 2024-03-19 |
| 11908790 | Chip structure with conductive via structure and method for forming the same | Ting-Li Yang, Ching-Wen Hsiao, Hong-Seng Shue, Yu-Tse Su | 2024-02-20 |
| 11901302 | InFO-POP structures with TIVs having cavities | Jing-Cheng Lin, Chen-Hua Yu | 2024-02-13 |
| 11862588 | Semiconductor device and method | Chen-Shien Chen, Ting-Li Yang, Chien-Chen Li, Ming-Da Cheng | 2024-01-02 |