MY

Ming-Chih Yew

TSMC: 22 patents #97 of 4,162Top 3%
📍 Hsinchu, MI: #1 of 8 inventorsTop 15%
Overall (2024): #2,002 of 561,600Top 1%
22
Patents 2024

Issued Patents 2024

Showing 1–22 of 22 patents

Patent #TitleCo-InventorsDate
12176301 Package structure and method for forming the same Po-Chen Lai, Chin-Hua Wang, Li-Ling Liao, Tsung-Yen Lee, Po-Yao Lin +1 more 2024-12-24
12170238 Semiconductor die package with multi-lid structures and method for forming the same Shu-Shen Yeh, Che-Chia Yang, Chia-Kuei Hsu, Po-Yao Lin, Shin-Puu Jeng 2024-12-17
12154888 Semiconductor package and method of manufacturing the same Chia-Kuei Hsu, Feng-Cheng Hsu, Po-Yao Lin, Shuo-Mao Chen, Shin-Puu Jeng 2024-11-26
12132021 Method for fabricating semiconductor package Chia-Kuei Hsu, Po-Hao Tsai, Po-Yao Lin, Shin-Puu Jeng 2024-10-29
12125822 Method of manufacturing a semiconductor device package having dummy dies Che-Chia Yang, Shu-Shen Yeh, Po-Chen Lai, Po-Yao Lin, Shin-Puu Jeng 2024-10-22
12113033 Chip package structure Po-Chen Lai, Chin-Hua Wang, Chia-Kuei Hsu, Li-Ling Liao, Po-Yao Lin +1 more 2024-10-08
12100666 Method for forming chip package structure Shin-Puu Jeng, Techi Wong, Po-Yao Lin, Po-Hao Tsai, Po-Yao Chuang 2024-09-24
12100664 Semiconductor device with curved conductive lines and method of forming the same Chia-Kuei Hsu, Shu-Shen Yeh, Che-Chia Yang, Po-Yao Lin, Shin-Puu Jeng 2024-09-24
12094810 Reinforcing package using reinforcing patches Chia-Kuei Hsu, Po-Yao Lin, Shuo-Mao Chen, Feng-Cheng Hsu, Shin-Puu Jeng 2024-09-17
12057363 Chip package structure with multiple gap-filling layers and fabricating method thereof Po-Chen Lai, Po-Yao Lin, Chin-Hua Wang, Shin-Puu Jeng 2024-08-06
12040285 Structure and formation method of chip package with reinforcing structures Po-Chen Lai, Po-Yao Lin, Yu-Sheng Lin, Shin-Puu Jeng 2024-07-16
12040267 Organic interposer including intra-die structural reinforcement structures and methods of forming the same Li-Ling Liao, Chia-Kuei Hsu, Shu-Shen Yeh, Po-Yao Lin, Shin-Puu Jeng 2024-07-16
12035475 Semiconductor package with stress reduction design and method for forming the same Chia-Kuei Hsu, Po-Chen Lai, Po-Yao Lin, Shin-Puu Jeng 2024-07-09
12033947 Semiconductor package structure and method for forming the same Chia-Kuei Hsu, Shu-Shen Yeh, Po-Yao Lin, Shin-Puu Jeng 2024-07-09
12033928 Manufacturing method of semiconductor package Chia-Kuei Hsu, Shu-Shen Yeh, Po-Yao Lin, Shin-Puu Jeng 2024-07-09
12021045 Semiconductor device and method of manufacture Po-Hao Tsai, Po-Yao Chuang, Shin-Puu Jeng 2024-06-25
12014969 Package structure and method for forming the same Po-Chen Lai, Li-Ling Liao, Chin-Hua Wang, Po-Yao Lin, Shin-Puu Jeng 2024-06-18
12009278 Package structure with buffer layer embedded in lid layer Shu-Shen Yeh, Yu-Sheng Lin, Po-Yao Lin, Shin-Puu Jeng 2024-06-11
11997842 Dummy metal bonding pads for underfill application in semiconductor die packaging and methods of forming the same Shu-Shen Yeh, Chin-Hua Wang, Po-Yao Lin, Shin-Puu Jeng 2024-05-28
11984381 Semiconductor package structure and method for forming the same Po-Chen Lai, Po-Yao Lin, Chin-Hua Wang, Shin-Puu Jeng 2024-05-14
11908757 Die corner removal for molding compound crack suppression in semiconductor die packaging and methods for forming the same Chia-Kuei Hsu, Shu-Shen Yeh, Po-Yao Lin, Shin-Puu Jeng 2024-02-20
11862549 Semiconductor packages having conductive patterns of redistribution structure having ellipse-like shape Chia-Kuei Hsu, Po-Chen Lai, Chin-Hua Wang, Po-Yao Lin, Shin-Puu Jeng 2024-01-02