Issued Patents 2024
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12176301 | Package structure and method for forming the same | Chin-Hua Wang, Ming-Chih Yew, Li-Ling Liao, Tsung-Yen Lee, Po-Yao Lin +1 more | 2024-12-24 |
| 12125822 | Method of manufacturing a semiconductor device package having dummy dies | Che-Chia Yang, Shu-Shen Yeh, Ming-Chih Yew, Po-Yao Lin, Shin-Puu Jeng | 2024-10-22 |
| 12113033 | Chip package structure | Chin-Hua Wang, Ming-Chih Yew, Chia-Kuei Hsu, Li-Ling Liao, Po-Yao Lin +1 more | 2024-10-08 |
| 12087705 | Package structure with warpage-control element | Yu-Sheng Lin, Chien-Hung Chen, Po-Yao Lin, Shin-Puu Jeng | 2024-09-10 |
| 12057363 | Chip package structure with multiple gap-filling layers and fabricating method thereof | Ming-Chih Yew, Po-Yao Lin, Chin-Hua Wang, Shin-Puu Jeng | 2024-08-06 |
| 12040285 | Structure and formation method of chip package with reinforcing structures | Ming-Chih Yew, Po-Yao Lin, Yu-Sheng Lin, Shin-Puu Jeng | 2024-07-16 |
| 12035475 | Semiconductor package with stress reduction design and method for forming the same | Chia-Kuei Hsu, Ming-Chih Yew, Po-Yao Lin, Shin-Puu Jeng | 2024-07-09 |
| 12014969 | Package structure and method for forming the same | Ming-Chih Yew, Li-Ling Liao, Chin-Hua Wang, Po-Yao Lin, Shin-Puu Jeng | 2024-06-18 |
| 11990418 | Chip package structure with buffer structure and method for forming the same | Chin-Hua Wang, Ping-Tai CHEN, Che-Chia Yang, Yu-Sheng Lin, Po-Yao Lin +1 more | 2024-05-21 |
| 11984381 | Semiconductor package structure and method for forming the same | Ming-Chih Yew, Po-Yao Lin, Chin-Hua Wang, Shin-Puu Jeng | 2024-05-14 |
| 11978722 | Structure and formation method of package containing chip structure with inclined sidewalls | Shu-Shen Yeh, Che-Chia Yang, Li-Ling Liao, Po-Yao Lin, Shin-Puu Jeng | 2024-05-07 |
| 11967582 | Multi-chip device and method of formation | Chin-Hua Wang, Shu-Shen Yeh, Tsung-Yen Lee, Po-Yao Lin, Shin-Puu Jeng | 2024-04-23 |
| 11967547 | Solder resist structure to mitigate solder bridge risk | Chin-Hua Wang, Shu-Shen Yeh, Po-Yao Lin, Shin-Puu Jeng | 2024-04-23 |
| 11955455 | Embedded stress absorber in package | Shin-Puu Jeng, Chien-Sheng Chen, Po-Yao Lin, Shu-Shen Yeh | 2024-04-09 |
| 11915991 | Semiconductor device having first heat spreader and second heat spreader and manufacturing method thereof | Shu-Shen Yeh, Po-Yao Lin, Yu-Sheng Lin, Shin-Puu Jeng | 2024-02-27 |
| 11894320 | Semiconductor device package with stress reduction design and method of forming the same | Shu-Shen Yeh, Chin-Hua Wang, Po-Yao Lin, Shin-Puu Jeng | 2024-02-06 |
| 11862549 | Semiconductor packages having conductive patterns of redistribution structure having ellipse-like shape | Chia-Kuei Hsu, Ming-Chih Yew, Chin-Hua Wang, Po-Yao Lin, Shin-Puu Jeng | 2024-01-02 |