Issued Patents 2023
Showing 1–25 of 69 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11855059 | Fan-out package with cavity substrate | Po-Hao Tsai, Techi Wong, Po-Yao Chuang, Meng-Wei Chou, Meng-Liang Lin | 2023-12-26 |
| 11855066 | Semiconductor structure and manufacturing method thereof | Hsiang-Tai Lu, Shuo-Mao Chen, Mill-Jer Wang, Feng-Cheng Hsu, Chao-Hsiang Yang +4 more | 2023-12-26 |
| 11855008 | Stacking via structures for stress reduction | Shu-Shen Yeh, Che-Chia Yang, Chin-Hua Wang, Po-Yao Lin, Chia-Hsiang Lin | 2023-12-26 |
| 11855004 | Package structure | Chia-Kuei Hsu, Ming-Chih Yew, Shu-Shen Yeh, Che-Chia Yang, Po-Yao Lin | 2023-12-26 |
| 11854956 | Semiconductor die package with conductive line crack prevention design | Ya Huei Lee, Shu-Shen Yeh, Kuo-Ching Hsu, Shyue-Ter Leu, Po-Yao Lin | 2023-12-26 |
| 11855009 | Chip package with lid | Shu-Shen Yeh, Chin-Hua Wang, Kuang-Chun Lee, Po-Yao Lin, Shyue-Ter Leu | 2023-12-26 |
| 11854929 | Semiconductor package and method of forming the same | Yu-Sheng Lin, Chin-Hua Wang, Shu-Shen Yeh, Chien-Hung Chen, Po-Yao Lin | 2023-12-26 |
| 11854837 | Semiconductor devices and methods of manufacturing | Po-Chen Lai, Ming-Chih Yew, Po-Yao Lin, Chien-Sheng Chen | 2023-12-26 |
| 11854955 | Fan-out package with controllable standoff | Po-Hao Tsai, Techi Wong, Meng-Wei Chou, Meng-Liang Lin, Po-Yao Chuang | 2023-12-26 |
| 11848305 | Semiconductor packages including passive devices and methods of forming same | Po-Yao Chuang, Shuo-Mao Chen | 2023-12-19 |
| 11848265 | Semiconductor package with improved interposer structure | Yi-Wen Wu, Techi Wong, Po-Hao Tsai, Po-Yao Chuang, Shih-Ting Hung | 2023-12-19 |
| 11830745 | 3D packages and methods for forming the same | Tzu-Wei Chiu, Cheng-Hsien Hsieh, Hsien-Pin Hu, Kuo-Ching Hsu, Shang-Yun Hou | 2023-11-28 |
| 11830800 | Metallization structure and package structure | Chia-Kuei Hsu, Ming-Chih Yew, Shu-Shen Yeh, Po-Yao Lin | 2023-11-28 |
| 11830859 | Package structures and method for forming the same | Chin-Hua Wang, Shu-Shen Yeh, Po-Chen Lai, Po-Yao Lin | 2023-11-28 |
| 11823991 | Frames stacked on substrate encircling devices and manufacturing method thereof | Chien-Hung Chen, Shu-Shen Yeh, Yu-Sheng Lin, Po-Yao Lin | 2023-11-21 |
| 11824007 | Dual-sided routing in 3D SiP structure | Po-Hao Tsai, Po-Yao Chuang, Meng-Liang Lin, Yi-Wen Wu, Techi Wong | 2023-11-21 |
| 11823887 | Package structure and method of fabricating the same | Yu-Sheng Lin, Han-Hsiang Huang, Chien-Sheng Chen, Shu-Shen Yeh | 2023-11-21 |
| 11810830 | Chip package structure with cavity in interposer | Feng-Cheng Hsu, Shuo-Mao Chen | 2023-11-07 |
| 11804451 | Package structure and method of fabricating the same | Yi-Wen Wu, Shih-Ting Hung, Po-Yao Chuang | 2023-10-31 |
| 11804475 | Semiconductor package for thermal dissipation | Chen-Hua Yu, Der-Chyang Yeh, Hsien-Wei Chen, Cheng-Chieh Hsieh, Ming-Yen Chiu | 2023-10-31 |
| 11798897 | Package structure and methods of manufacturing the same | Shu-Shen Yeh, Po-Yao Lin, Chin-Hua Wang, Chia-Kuei Hsu | 2023-10-24 |
| 11798898 | Package structure | Hsiao-Wen Lee, Hsien-Wen Liu | 2023-10-24 |
| 11791301 | Chip package structure | Shuo-Mao Chen, Feng-Cheng Hsu | 2023-10-17 |
| 11784061 | Chip package structure and method for forming the same | Yu-Sheng Lin, Po-Yao Lin, Shu-Shen Yeh, Chin-Hua Wang | 2023-10-10 |
| 11784130 | Structure and formation method of package with underfill | Yu-Sheng Lin, Po-Yao Lin, Chin-Hua Wang, Shu-Shen Yeh, Che-Chia Yang | 2023-10-10 |