Issued Patents 2019
Showing 1–25 of 154 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10522491 | Semiconductor device and bump formation process | Yi-Li Hsiao, Shin-Puu Jeng, Chih-Hang Tung, Cheng-Chang Wei | 2019-12-31 |
| 10522481 | Post-passivation interconnect structure | Hsien-Wei Chen, Hao-Yi Tsai, Mirng-Ji Lii | 2019-12-31 |
| 10522449 | Packages with Si-substrate-free interposer and method forming same | Ming-Fa Chen | 2019-12-31 |
| 10522501 | Semiconductor structure and method of forming the same | Hui-Jung Tsai, Yun Chen Hsieh, Jyun-Siang Peng, Tai-Min Chang, Yi-Yang Lei +1 more | 2019-12-31 |
| 10522473 | Alignment mark design for packages | Li-Hsien Huang, Hsien-Wei Chen, Ching-Wen Hsiao, Der-Chyang Yeh, Shin-Puu Jeng | 2019-12-31 |
| 10515865 | Underfill control structures and method | Ying-Ju Chen, An-Jhih Su, Hsien-Wei Chen, Der-Chyang Yeh, Chi-Hsi Wu | 2019-12-24 |
| 10515901 | InFO-POP structures with TIVs having cavities | Jing-Cheng Lin, Po-Hao Tsai | 2019-12-24 |
| 10515829 | Package system for integrated circuits | Wei-Cheng Wu, Shang-Yun Hou, Shin-Puu Jeng | 2019-12-24 |
| 10515940 | Method and structure of three-dimensional chip stacking | Wen-Chih Chiou, Yung-Chi Lin | 2019-12-24 |
| 10515921 | Semiconductor package and method of fabricating semiconductor package | Kuo-Chung Yee, Chun-Hui Yu | 2019-12-24 |
| 10513070 | Wafer level transfer molding and apparatus for performing the same | Bor-Ping Jang, Yeong-Jyh Lin, Chien Ling Hwang, Chung-Shi Liu, Meng-Tse Chen +1 more | 2019-12-24 |
| 10515851 | Method for forming semiconductor device structure with conductive shielding structure | Chuei-Tang Wang | 2019-12-24 |
| 10515933 | System, structure, and method of manufacturing a semiconductor substrate stack | Hung-Pin Chang, Weng-Jin Wu, Wen-Chih Chiou | 2019-12-24 |
| 10510679 | Semiconductor device with shield for electromagnetic interference | Chuei-Tang Wang, Wei-Ting Chen, Chieh-Yen Chen | 2019-12-17 |
| 10510670 | Pad structure design in fan-out package | Shin-Puu Jeng, Der-Chyang Yeh, Hsien-Wei Chen | 2019-12-17 |
| 10510681 | Semiconductor device | Chuei-Tang Wang, Vincent Chen, Tzu-Chun Tang, Ching-Feng Yang, Ming-Kai Liu +5 more | 2019-12-17 |
| 10510654 | Dummy metal with zigzagged edges | Cheng-Hsien Hsieh, Hsien-Wei Chen, Chi-Hsi Wu, Der-Chyang Yeh, Li-Han Hsu +1 more | 2019-12-17 |
| 10510674 | Fan-out package having a main die and a dummy die, and method of forming | Yan-Fu Lin, Meng-Tsan Lee, Wei-Cheng Wu, Hsien-Wei Chen | 2019-12-17 |
| 10510682 | Semiconductor device with shield for electromagnetic interference | Chuei-Tang Wang, Wei-Ting Chen, Chieh-Yen Chen | 2019-12-17 |
| 10510695 | Package structure and method of forming the same | Chun-Hui Yu, Kuo-Chung Yee | 2019-12-17 |
| 10510556 | Integrated circuit package pad and methods of forming | Hsien-Wei Chen, Chi-Hsi Wu, Der-Chyang Yeh, An-Jhih Su, Wei-Yu Chen | 2019-12-17 |
| 10510630 | Molding structure for wafer level package | Chung-Shi Liu, Chih-Fan Huang, Chih-Wei Lin, Wei-Hung Lin, Ming-Da Cheng | 2019-12-17 |
| 10510645 | Planarizing RDLs in RDL-first processes through CMP process | Po-Han Wang, Yu-Hsiang Hu, Hung-Jui Kuo | 2019-12-17 |
| 10510660 | Semiconductor package devices integrated with inductor | Wei-Ting Chen, In-Tsang Lin, Vincent Chen, Chuei-Tang Wang | 2019-12-17 |
| 10510710 | Bump-on-trace interconnect | Chen-Shien Chen | 2019-12-17 |