SJ

Shin-Puu Jeng

TSMC: 35 patents #10 of 3,065Top 1%
📍 Waishuangxi, TX: #1 of 1 inventorsTop 100%
Overall (2019): #616 of 560,194Top 1%
35
Patents 2019

Issued Patents 2019

Showing 1–25 of 35 patents

Patent #TitleCo-InventorsDate
10522491 Semiconductor device and bump formation process Yi-Li Hsiao, Chen-Hua Yu, Chih-Hang Tung, Cheng-Chang Wei 2019-12-31
10522473 Alignment mark design for packages Li-Hsien Huang, Hsien-Wei Chen, Ching-Wen Hsiao, Der-Chyang Yeh, Chen-Hua Yu 2019-12-31
10515827 Method for forming chip package with recessed interposer substrate Po-Hao Tsai, Po-Yao Chuang, Feng-Cheng Hsu, Shuo-Mao Chen, Techi Wong 2019-12-24
10515930 Three-layer package-on-package structure and method forming same Jui-Pin Hung, Feng-Cheng Hsu 2019-12-24
10515829 Package system for integrated circuits Wei-Cheng Wu, Shang-Yun Hou, Chen-Hua Yu 2019-12-24
10510670 Pad structure design in fan-out package Chen-Hua Yu, Der-Chyang Yeh, Hsien-Wei Chen 2019-12-17
10510690 Wafer level package (WLP) and method for forming the same Hsien-Wen Liu 2019-12-17
10510561 Semiconductor device package including conformal metal cap contacting each semiconductor die Chen-Yu Tsai, Tsung-Shang Wei, Yu-Sheng Lin, Wen-Chih Chiou 2019-12-17
10504752 Integrated passive device package and methods of forming same Feng-Cheng Hsu, Shuo-Mao Chen, Jui-Pin Hung 2019-12-10
10504880 Method of forming semicondcutor device package Po-Yao Lin, Cheng-Yi Hong, Feng-Cheng Hsu, Shuo-Mao Chen, Shu-Shen Yeh +1 more 2019-12-10
10497616 Embedded 3D interposer structure Ying-Ching Shih, Jing-Cheng Lin, Wen-Chih Chiou, Chen-Hua Yu 2019-12-03
10475769 Semiconductor package and manufacturing method of the same Feng-Cheng Hsu, Jui-Pin Hung 2019-11-12
10475759 Integrated circuit structure having dies with connectors of different sizes Chen-Hua Yu, Jing-Cheng Lin 2019-11-12
RE47709 Forming grounded through-silicon vias in a semiconductor substrate Chi-Chun Hsieh, Wei-Cheng Wu, Hsiao-Tsung Yen, Hsien-Pin Hu, Shang-Yun Hou 2019-11-05
10468339 Heterogeneous fan-out structure and method of manufacture Po-Hao Tsai, Po-Yao Chuang, Techi Wong 2019-11-05
10461009 3DIC packaging with hot spot thermal management features Wensen Hung, Szu-Po Huang, Hsiang-Fan Lee, Kim Hong Chen, Chi-Hsi Wu 2019-10-29
10446520 3D semiconductor package interposer with die cavity Shang-Yun Hou, Kim Hong Chen, Wensen Hung, Szu-Po Huang 2019-10-15
10354988 Using metal-containing layer to reduce carrier shock in package formation Hsien-Wen Liu, Yi-Jou Lin 2019-07-16
10347612 Solution for reducing poor contact in InFO package Jing-Cheng Lin, Chen-Hua Yu, Szu-Wei Lu, Shih-Ting Lin 2019-07-09
10347574 Integrated fan-out packages Dai-Jang Chen, Hsiang-Tai Lu, Hsien-Wen Liu, Chih-Hsien Lin, Shih-Ting Hung +1 more 2019-07-09
10332823 Packaged semiconductor devices Kim Hong Chen, Szu-Po Huang, Wensen Hung 2019-06-25
10290590 Stacked semiconductor device and method of manufacturing the same Tzu-Jui Fang, Hsi-Kuei Cheng, Chih-Kang Han, Yi-Jen Lai, Hsien-Wen Liu +1 more 2019-05-14
10290605 Fan-out package structure and method for forming the same Hsien-Wen Liu, Po-Yao Chuang, Tzu-Jui Fang, Yi-Jou Lin 2019-05-14
10283428 Semiconductor package and method manufacturing the same Feng-Cheng Hsu 2019-05-07
10283474 Chip package structure and method for forming the same Shuo-Mao Chen, Feng-Cheng Hsu 2019-05-07