Issued Patents 2019
Showing 26–35 of 35 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10276551 | Semiconductor device package and method of forming semiconductor device package | Po-Yao Lin, Cheng-Yi Hong, Feng-Cheng Hsu, Shuo-Mao Chen, Shu-Shen Yeh +1 more | 2019-04-30 |
| 10269584 | 3D packages and methods for forming the same | Tzu-Wei Chiu, Cheng-Hsien Hsieh, Hsien-Pin Hu, Kuo-Ching Hsu, Shang-Yun Hou | 2019-04-23 |
| 10269752 | Package with UBM and methods of forming | Chen-Hua Yu, Chien-Yu Li, Hung-Jui Kuo, Li-Hsien Huang, Hsien-Wei Chen +2 more | 2019-04-23 |
| 10269730 | Methods of manufacturing an integrated circuit having stress tuning layer | Clinton Chao, Szu-Wei Lu | 2019-04-23 |
| 10269723 | Alignment mark design for packages | Li-Hsien Huang, Hsien-Wei Chen, Ching-Wen Hsiao, Der-Chyang Yeh, Chen-Hua Yu | 2019-04-23 |
| 10269682 | Cooling devices, packaged semiconductor devices, and methods of packaging semiconductor devices | Cheng-Chieh Hsieh, Chi-Hsi Wu, Tsung-Yu Chen, Wensen Hung | 2019-04-23 |
| 10269602 | Wafer warpage inspection system and method using the same | Wen-Yi Lin, Po-Yao Lin | 2019-04-23 |
| 10262939 | Configurable routing for packaging applications | Chung-Yu Lu, Hsien-Pin Hu, Shang-Yun Hou, Tzuan-Horng Liu, Shih-Wen Huang +1 more | 2019-04-16 |
| 10175294 | Testing of semiconductor chips with microbumps | Wei-Cheng Wu, Hsien-Pin Hu, Shang-Yun Hou, Chen-Hua Yu, Chao-Hsiang Yang | 2019-01-08 |
| 10170396 | Through via structure extending to metallization layer | Yi-Hsiu Chen, Ku-Feng Yang, Wen-Chih Chiou, Chen-Hua Yu | 2019-01-01 |