Issued Patents 2019
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10515930 | Three-layer package-on-package structure and method forming same | Jui-Pin Hung, Shin-Puu Jeng | 2019-12-24 |
| 10515827 | Method for forming chip package with recessed interposer substrate | Shin-Puu Jeng, Po-Hao Tsai, Po-Yao Chuang, Shuo-Mao Chen, Techi Wong | 2019-12-24 |
| 10504752 | Integrated passive device package and methods of forming same | Shuo-Mao Chen, Jui-Pin Hung, Shin-Puu Jeng | 2019-12-10 |
| 10504880 | Method of forming semicondcutor device package | Po-Yao Lin, Cheng-Yi Hong, Shuo-Mao Chen, Shin-Puu Jeng, Shu-Shen Yeh +1 more | 2019-12-10 |
| 10475769 | Semiconductor package and manufacturing method of the same | Jui-Pin Hung, Shin-Puu Jeng | 2019-11-12 |
| 10354982 | Integrated fan-out structure with guiding trenches in buffer layer | Po-Hao Tsai, Li-Hui Cheng, Jui-Pin Hung, Jing-Cheng Lin | 2019-07-16 |
| 10283474 | Chip package structure and method for forming the same | Shin-Puu Jeng, Shuo-Mao Chen | 2019-05-07 |
| 10283428 | Semiconductor package and method manufacturing the same | Shin-Puu Jeng | 2019-05-07 |
| 10276551 | Semiconductor device package and method of forming semiconductor device package | Po-Yao Lin, Cheng-Yi Hong, Shuo-Mao Chen, Shin-Puu Jeng, Shu-Shen Yeh +1 more | 2019-04-30 |