Issued Patents 2019
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10515940 | Method and structure of three-dimensional chip stacking | Chen-Hua Yu, Wen-Chih Chiou | 2019-12-24 |
| 10510641 | Semiconductor device having backside interconnect structure on through substrate via and method of forming the same | Hsin-Yu Chen, Ming-Tsu Chung, HsiaoYun Lo, Hong-Ye Shih, Chia-Yin Chen +3 more | 2019-12-17 |
| 10497619 | Method of manufacturing a semiconductor device including through silicon plugs | Chen-Hua Yu, Chia-Lin Yu, Hung-Pin Chang, Chien Ling Hwang, Jui-Pin Hung | 2019-12-03 |
| 10396014 | Robust through-silicon-via structure | Tsang-Jiuh Wu, Wen-Chih Chiou | 2019-08-27 |
| 10297550 | 3D IC architecture with interposer and interconnect structure for bonding dies | Hsien-Pin Hu, Chen-Hua Yu, Ming-Fa Chen, Jing-Cheng Lin, Jiun-Ren Lai | 2019-05-21 |