Issued Patents 2018
Showing 76–100 of 148 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10049898 | Semiconductor device packages, packaging methods, and packaged semiconductor devices | Hsien-Wei Chen, Chi-Hsi Wu, Der-Chyang Yeh, Wei-Cheng Wu, Chien-Fu Tseng | 2018-08-14 |
| 10049953 | Method of manufacturing an integrated fan-out package having fan-out redistribution layer (RDL) to accommodate electrical connectors | Kuo-Chung Yee, Hao-Yi Tsai, Tin-Hao Kuo | 2018-08-14 |
| 10049931 | Method of manufacturing a semiconductor device including through silicon plugs | Hung-Pin Chang, Yung-Chi Lin, Chia-Lin Yu, Jui-Pin Hung, Chien Ling Hwang | 2018-08-14 |
| 10049928 | Embedded 3D interposer structure | Ying-Ching Shih, Jing-Cheng Lin, Wen-Chih Chiou, Shin-Puu Jeng | 2018-08-14 |
| 10043761 | Semiconductor device and manufacturing method thereof | Chuei-Tang Wang, Vincent Chen, Tzu-Chun Tang, Ching-Feng Yang, Ming-Kai Liu +5 more | 2018-08-07 |
| 10043778 | Methods of packaging semiconductor devices and packaged semiconductor devices | Chung-Shi Liu, Meng-Tse Chen, Hui-Min Huang, Chih-Fan Huang, Ming-Da Cheng | 2018-08-07 |
| 10043770 | System and method for an improved interconnect structure | Hsien-Wei Chen, Hao-Yi Tsai, Mirng-Ji Lii, Tsung-Yuan Yu | 2018-08-07 |
| 10043745 | Semiconductor package devices integrated with inductor | Wei-Ting Chen, In-Tsang Lin, Vincent Chen, Chuei-Tang Wang | 2018-08-07 |
| 10037963 | Package structure and method of forming the same | Jie Chen, Hsien-Wei Chen, Der-Chyang Yeh | 2018-07-31 |
| 10037892 | Multi-chip structure and method of forming same | Der-Chyang Yeh | 2018-07-31 |
| 10032725 | Semiconductor structure and manufacturing method thereof | Kuo-Chung Yee, Jui-Pin Hung | 2018-07-24 |
| 10034390 | Metal post bonding using pre-fabricated metal posts | Yi-Li Hsiao, Su-Chun Yang, Chih-Hang Tung, Da-Yuan Shih | 2018-07-24 |
| 10032735 | Semiconductor structure and method of forming | Yu-Hsiang Hu, Hung-Jui Kuo | 2018-07-24 |
| 10032734 | Semiconductor package system and method | Hui-Min Huang, Chih-Wei Lin, Tsai-Tsung Tsai, Ming-Da Cheng, Chung-Shi Liu | 2018-07-24 |
| 10032722 | Semiconductor package structure having am antenna pattern and manufacturing method thereof | Kuo-Chung Yee | 2018-07-24 |
| 10026716 | 3DIC formation with dies bonded to formed RDLs | Sung-Feng Yeh, Ming-Fa Chen | 2018-07-17 |
| 10026671 | Substrate design for semiconductor packages and method of forming same | Mirng-Ji Lii, Chien-Hsun Lee, Tsung-Ding Wang, Jung Wei Cheng, Ming-Che Liu +2 more | 2018-07-17 |
| 10020211 | Wafer-level molding chase design | Chung-Shi Liu, Hui-Min Huang, Chih-Fan Huang, Ming-Da Cheng, Meng-Tse Chen +2 more | 2018-07-10 |
| 10020344 | CIS chips and methods for forming the same | Wen-Chih Chiou, Jing-Cheng Lin | 2018-07-10 |
| 10020286 | Package on package devices and methods of packaging semiconductor dies | Yung Ching Chen, Chien-Hsun Lee, Jiun Yi Wu, Ming-Da Cheng, Mirng-Ji Lii | 2018-07-10 |
| 10020236 | Dam for three-dimensional integrated circuit | Tsung-Ding Wang, An-Jhih Su, Chien Ling Hwang, Jung Wei Cheng, Hsin-Yu Pan | 2018-07-10 |
| 10014271 | Semiconductor structure and method of manufacturing the same | Ming-Fa Chen, Sung-Feng Yeh | 2018-07-03 |
| 9997464 | Dummy features in redistribution layers (RDLS) and methods of forming same | Cheng-Hsien Hsieh, Li-Han Hsu, Wei-Cheng Wu, Hsien-Wei Chen, Der-Chyang Yeh +1 more | 2018-06-12 |
| 9997497 | Through silicon via structure | Shin-Puu Jeng, Wen-Chih Chiou, Fang Wen Tsai, Chen-Yu Tsai | 2018-06-12 |
| 9997467 | Semiconductor packages and methods of forming the same | Tung-Liang Shao, Chih-Hang Tung | 2018-06-12 |