Issued Patents 2018
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10163804 | Molding structure for wafer level package | Chen-Hua Yu, Chung-Shi Liu, Chih-Fan Huang, Wei-Hung Lin, Ming-Da Cheng | 2018-12-25 |
| 10128275 | Display device | Hung-Kun Chen, Hong-Kang Chang, Hsieh-Li Chou, Yu-Chien Kao, Li-Wei Sung +1 more | 2018-11-13 |
| 10079591 | Resistance calibration circuit and device | Kai Liu | 2018-09-18 |
| 10050921 | Analyzing email threads | Song Bai, Ming Qun Chi, Hui Liu, Xiang Shi, Ang Yi | 2018-08-14 |
| 10043778 | Methods of packaging semiconductor devices and packaged semiconductor devices | Chen-Hua Yu, Chung-Shi Liu, Meng-Tse Chen, Chih-Fan Huang, Ming-Da Cheng | 2018-08-07 |
| 10032734 | Semiconductor package system and method | Chih-Wei Lin, Tsai-Tsung Tsai, Ming-Da Cheng, Chung-Shi Liu, Chen-Hua Yu | 2018-07-24 |
| 10020211 | Wafer-level molding chase design | Chen-Hua Yu, Chung-Shi Liu, Chih-Fan Huang, Ming-Da Cheng, Meng-Tse Chen +2 more | 2018-07-10 |
| 9991190 | Packaging with interposer frame | Yen-Chang Hu, Chih-Wei Lin, Ming-Da Cheng, Chung-Shi Liu, Chen-Shien Chen | 2018-06-05 |
| 9947552 | Structure and formation method of chip package with fan-out structure | Shing-Chao Chen, Chih-Wei Lin, Meng-Tse Chen, Ming-Da Cheng, Kuo Lung Pan +3 more | 2018-04-17 |
| 9911575 | Apparatus for charged particle lithography system | Shih-Chi Wang, Tsung-Chih Chien, Jaw-Jung Shin, Shy-Jay Lin, Burn Jeng Lin | 2018-03-06 |
| 9892962 | Wafer level chip scale package interconnects and methods of manufacture thereof | Cheng-Tar Wu, Chung-Shi Liu, Chih-Wei Lin, Chun-Cheng Lin, Ming-Da Cheng | 2018-02-13 |
| 9887162 | Molding structure for wafer level package | Chen-Hua Yu, Chung-Shi Liu, Chih-Fan Huang, Wei-Hung Lin, Ming-Da Cheng | 2018-02-06 |
| 9871018 | Packaged semiconductor devices and methods of packaging semiconductor devices | Chen-Hua Yu, Chung-Shi Liu, Chih-Fan Huang, Wei-Hung Lin, Ming-Da Cheng | 2018-01-16 |