Issued Patents 2018
Showing 1–25 of 49 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10163804 | Molding structure for wafer level package | Chen-Hua Yu, Chung-Shi Liu, Chih-Fan Huang, Hui-Min Huang, Wei-Hung Lin | 2018-12-25 |
| 10163734 | Method for manufacturing semiconductor structure | Chen-Hua Yu, Chih-Fan Huang, Chun-Hung Lin, Chung-Shi Liu, Mirng-Ji Lii | 2018-12-25 |
| 10157893 | Package-on-package (PoP) structure including stud bulbs | Chen-Hua Yu, Mirng-Ji Lii, Chung-Shi Liu | 2018-12-18 |
| 10157849 | Packages with molding structures and methods of forming the same | Chih-Fan Huang, Cheng-Tar Wu, Chung-Shi Liu, Chen-Hua Yu | 2018-12-18 |
| 10157846 | Method for forming chip package involving cutting process | Shing-Chao Chen, Chih-Wei Lin, Tsung-Hsien Chiang, Ching-Hua Hsieh | 2018-12-18 |
| 10153180 | Semiconductor bonding structures and methods | Meng-Tse Chen, Hsiu-Jen Lin, Wei-Hung Lin, Kuei-Wei Huang, Chung-Shi Liu | 2018-12-11 |
| 10147693 | Methods for stud bump formation | Chien Ling Hwang, Yeong-Jyh Lin, Yi-Li Hsiao, Tsai-Tsung Tsai, Chung-Shi Liu +2 more | 2018-12-04 |
| 10141281 | Substrate and package structure | Wei-Hung Lin, Hsiu-Jen Lin, Yu-Min Liang, Chen-Shien Chen, Chung-Shi Liu | 2018-11-27 |
| 10134703 | Package on-package process for applying molding compound | Meng-Tse Chen, Wei-Hung Lin, Sheng-Yu Wu, Bor-Ping Jang, Chung-Shi Liu +6 more | 2018-11-20 |
| 10134717 | Semiconductor package, semiconductor device and method of forming the same | Chen-Hua Yu, Chung-Shi Liu, Chih-Fan Huang, Tsai-Tsung Tsai, Wei-Hung Lin | 2018-11-20 |
| 10134699 | Packages with solder ball revealed through layer | Yu-Hsiang Hu, Wei-Yu Chen, Hung-Jui Kuo, Chung-Shi Liu | 2018-11-20 |
| 10128206 | Conductive pillar structure | Chih-Wei Lin, Wen-Hsiung Lu, Meng-Wei Chou, Hung-Jui Kuo, Chung-Shi Liu | 2018-11-13 |
| 10128193 | Package structure and method for forming the same | Shing-Chao Chen, Chih-Wei Lin, Ching-Yao Lin, Ching-Hua Hsieh | 2018-11-13 |
| 10109612 | Tools and systems for processing semiconductor devices, and methods of processing semiconductor devices | Kuei-Wei Huang, Hsiu-Jen Lin, Ai-Tee Ang, Chung-Shi Liu | 2018-10-23 |
| 10109618 | Bonding structure between semiconductor device package | James Hu, Chung-Shi Liu | 2018-10-23 |
| 10090254 | Wafer alignment methods in die sawing process | Yu-Hsiang Hu, Chung-Shi Liu | 2018-10-02 |
| 10079213 | Packaging devices and methods of manufacture thereof | Hsien-Wei Chen, Tsung-Yuan Yu, Wen-Hsiung Lu | 2018-09-18 |
| 10062659 | System and method for an improved fine pitch joint | Cheng-Ting Chen, Wen-Hsiung Lu, Chung-Shi Liu, Mirng-Ji Lii | 2018-08-28 |
| 10050000 | Bump-on-trace structures with high assembly yield | Chih-Fan Huang, Chen-Shien Chen, Chung-Shi Liu, Tin-Hao Kuo, Yi-Teh Chou | 2018-08-14 |
| 10050001 | Packaging device and method of making the same | Chang-Chia Huang, Tsung-Shu Lin, Wen-Hsiung Lu, Bor-Rung Su | 2018-08-14 |
| 10043778 | Methods of packaging semiconductor devices and packaged semiconductor devices | Chen-Hua Yu, Chung-Shi Liu, Meng-Tse Chen, Hui-Min Huang, Chih-Fan Huang | 2018-08-07 |
| 10032734 | Semiconductor package system and method | Hui-Min Huang, Chih-Wei Lin, Tsai-Tsung Tsai, Chung-Shi Liu, Chen-Hua Yu | 2018-07-24 |
| 10020286 | Package on package devices and methods of packaging semiconductor dies | Yung Ching Chen, Chien-Hsun Lee, Chen-Hua Yu, Jiun Yi Wu, Mirng-Ji Lii | 2018-07-10 |
| 10020211 | Wafer-level molding chase design | Chen-Hua Yu, Chung-Shi Liu, Hui-Min Huang, Chih-Fan Huang, Meng-Tse Chen +2 more | 2018-07-10 |
| 10015888 | Interconnect joint protective layer apparatus and method | Cheng-Ting Chen, Hsuan-Ting Kuo, Hsien-Wei Chen, Wen-Hsiung Lu, Chung-Shi Liu | 2018-07-03 |