Issued Patents 2018
Showing 1–24 of 24 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10163844 | Semiconductor device having conductive bumps of varying heights | Yen-Liang Lin, Sheng-Yu Wu, Chen-Shien Chen | 2018-12-25 |
| 10163801 | Structure and formation method of chip package with fan-out structure | Chih-Horng Chang | 2018-12-25 |
| 10157874 | Contact area design for solder bonding | Pei-Chun Tsai, Yu-Feng Chen, Chen-Shien Chen, Yu-Chih Huang, Sheng-Yu Wu | 2018-12-18 |
| 10153243 | Semiconductor devices, methods of manufacture thereof, and packaged semiconductor devices | Yu-Jen Tseng, Yen-Liang Lin, Chen-Shien Chen, Mirng-Ji Lii | 2018-12-11 |
| 10153249 | Dual-sided integrated fan-out package | Kuo Lung Pan, Wei Sen Chang, Hao-Yi Tsai, Chung-Shi Liu | 2018-12-11 |
| 10128195 | Substrate design with balanced metal and solder resist density | Yu-Wei Lin, Guan-Yu Chen, Yu-Min Liang, Chen-Shien Chen | 2018-11-13 |
| 10128213 | Integrated fan-out stacked package with fan-out redistribution layer (RDL) | Chen-Hua Yu, Kuo-Chung Yee, Hao-Yi Tsai | 2018-11-13 |
| 10056345 | Conical-shaped or tier-shaped pillar connections | Chen-Shien Chen, Mirng-Ji Lii, Chen-Hua Yu, Sheng-Yu Wu, Yao-Chun Chuang | 2018-08-21 |
| 10049953 | Method of manufacturing an integrated fan-out package having fan-out redistribution layer (RDL) to accommodate electrical connectors | Chen-Hua Yu, Kuo-Chung Yee, Hao-Yi Tsai | 2018-08-14 |
| 10050000 | Bump-on-trace structures with high assembly yield | Chih-Fan Huang, Chen-Shien Chen, Chung-Shi Liu, Ming-Da Cheng, Yi-Teh Chou | 2018-08-14 |
| 10043774 | Integrated circuit packaging substrate, semiconductor package, and manufacturing method | Yu-Wei Lin, Chen-Shien Chen, Guan-Yu Chen, Yen-Liang Lin | 2018-08-07 |
| 10020276 | Protrusion bump pads for bond-on-trace processing | Chen-Shien Chen, Yu-Feng Chen, Yu-Wei Lin, Yu-Min Liang, Chun-Hung Lin | 2018-07-10 |
| 10008459 | Structures having a tapering curved profile and methods of making same | Pei-Chun Tsai, Yu-Jen Tseng, Chen-Shien Chen | 2018-06-26 |
| 9966346 | Bump structure and method of forming same | Guan-Yu Chen, Yu-Wei Lin, Yu-Jen Tseng, Chen-Shien Chen | 2018-05-08 |
| 9953939 | Conductive contacts having varying widths and method of manufacturing same | Yen-Liang Lin, Yu-Jen Tseng, Chang-Chia Huang, Chen-Shien Chen | 2018-04-24 |
| 9947552 | Structure and formation method of chip package with fan-out structure | Shing-Chao Chen, Chih-Wei Lin, Meng-Tse Chen, Hui-Min Huang, Ming-Da Cheng +3 more | 2018-04-17 |
| 9935073 | Semiconductor structure and manufacturing method of the same | Yen-Liang Lin, Mirng-Ji Lii, Chen-Shien Chen, Yu-Feng Chen, Sheng-Yu Wu | 2018-04-03 |
| 9935024 | Method for forming semiconductor structure | Pei-Chun Tsai, Wei Sen Chang, Hao-Yi Tsai | 2018-04-03 |
| 9929070 | Isolation rings for packages and the method of forming the same | Chih-Horng Chang, Tsung-Fu Tsai, Min-Feng Ku | 2018-03-27 |
| 9917035 | Bump-on-trace interconnection structure for flip-chip packages | Yu-Jen Tseng, Yen-Liang Lin, Chen-Shien Chen, Mirng-Ji Lii | 2018-03-13 |
| 9917072 | Method of manufacturing an integrated stacked package with a fan-out redistribution layer (RDL) and a same encapsulating process | Chen-Hua Yu, Kuo-Chung Yee, Hao-Yi Tsai | 2018-03-13 |
| 9899288 | Interconnect structures for wafer level package and methods of forming same | Chih-Hao Chang, Tsung-Hsien Chiang, Guan-Yu Chen, Wei Sen Chang, Hao-Yi Tsai +1 more | 2018-02-20 |
| 9871013 | Contact area design for solder bonding | Pei-Chun Tsai, Yu-Feng Chen, Chen-Shien Chen, Yu-Chih Huang, Sheng-Yu Wu | 2018-01-16 |
| 9870997 | Integrated fan-out package and method of fabricating the same | Chih-Hao Chang, Hsin-Hung Liao, Hao-Yi Tsai, Chien Ling Hwang, Wei Sen Chang +1 more | 2018-01-16 |