Issued Patents 2018
Showing 1–25 of 41 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10163705 | Profile of through via protrusion in 3DIC interconnect | Jiung Wu, Kuan-Liang Lai, Ming-Tsu Chung, Hong-Ye Shih, Ku-Feng Yang +3 more | 2018-12-25 |
| 10163876 | Semiconductor structure and manufacturing method thereof | Jui-Pin Hung, Feng-Cheng Hsu | 2018-12-25 |
| 10163861 | Semiconductor package for thermal dissipation | Chen-Hua Yu, Der-Chyang Yeh, Hsien-Wei Chen, Cheng-Chieh Hsieh, Ming-Yen Chiu | 2018-12-25 |
| 10163860 | Semiconductor package structure | Feng-Cheng Hsu, Shuo-Mao Chen, Jui-Pin Hung | 2018-12-25 |
| 10163822 | Chip-on-substrate packaging on carrier | Chen-Hua Yu, Tzu-Shiun Sheu, Shih-Peng Tai, An-Jhih Su, Chi-Hsi Wu | 2018-12-25 |
| 10163816 | Structure and formation method of chip package with lid | Shu-Shen Yeh, Chin-Hua Wang, Kuang-Chun Lee, Po-Yao Lin, Shyue-Ter Leu | 2018-12-25 |
| 10163706 | Alignment marks in substrate having through-substrate via (TSV) | Hsin Chang, Fang Wen Tsai, Jing-Cheng Lin, Wen-Chih Chiou | 2018-12-25 |
| 10157818 | Methods of cooling packaged semiconductor devices | Kim Hong Chen, Szu-Po Huang, Wensen Hung | 2018-12-18 |
| 10157879 | Die-to-die gap control for semiconductor structure and method | Jing-Cheng Lin, Szu-Wei Lu, Ying-Ching Shih, Ying-Da Wang, Li-Chung Kuo +2 more | 2018-12-18 |
| 10157813 | 3DIC packaging with hot spot thermal management features | Wensen Hung, Szu-Po Huang, Hsiang-Fan Lee, Kim Hong Chen, Chi-Hsi Wu | 2018-12-18 |
| 10153338 | Method of manufacturing a capacitor | Chun Hua Chang, Der-Chyang Yeh, Kuang-Wei Cheng, Yuan-Hung Liu, Shang-Yun Hou +1 more | 2018-12-11 |
| 10109547 | Semiconductor device and method of manufacture | Shu-Shen Yeh, Po-Yao Lin, Shyue-Ter Leu, Chih-Kung Huang, Tsung-Ming Yeh | 2018-10-23 |
| 10090213 | Interposer test structures and methods | Tzuan-Horng Liu, Chen-Hua Yu, Hsien-Pin Hu, Tzu-Yu Wang, Wei-Cheng Wu +1 more | 2018-10-02 |
| 10083949 | Using metal-containing layer to reduce carrier shock in package formation | Hsien-Wen Liu, Yi-Jou Lin | 2018-09-25 |
| 10074631 | Packages and packaging methods for semiconductor devices, and packaged semiconductor devices | Chen-Hua Yu, Hsien-Wei Chen, Der-Chyang Yeh, An-Jhih Su | 2018-09-11 |
| 10074637 | Structure and formation method for chip package | Jui-Pin Hung, Cheng-Lin Huang, Hsien-Wen Liu | 2018-09-11 |
| 10074617 | Wafer level package (WLP) and method for forming the same | Hsien-Wen Liu | 2018-09-11 |
| 10062665 | Semiconductor packages with thermal management features for reduced thermal crosstalk | Kim Hong Chen, Wensen Hung, Szu-Po Huang | 2018-08-28 |
| 10056347 | Bump structure for yield improvement | Tzu-Wei Chiu, Tzu-Yu Wang, Shang-Yun Hou, Hsien-Wei Chen, Hung-An Teng +1 more | 2018-08-21 |
| 10049928 | Embedded 3D interposer structure | Ying-Ching Shih, Jing-Cheng Lin, Wen-Chih Chiou, Chen-Hua Yu | 2018-08-14 |
| 10050024 | Semiconductor package and manufacturing method of the same | Jui-Pin Hung, Feng-Cheng Hsu, Shuo-Mao Chen | 2018-08-14 |
| 9997471 | Semiconductor package structure and manufacturing method thereof | Jui-Pin Hung, Feng-Cheng Hsu, Shuo-Mao Chen, De-Dui Liao | 2018-06-12 |
| 9997497 | Through silicon via structure | Chen-Hua Yu, Wen-Chih Chiou, Fang Wen Tsai, Chen-Yu Tsai | 2018-06-12 |
| 9985006 | Semiconductor structure and manufacturing method thereof | Jui-Pin Hung, Feng-Cheng Hsu | 2018-05-29 |
| 9985001 | 3DIC package and methods of forming the same | Kim Hong Chen, Szu-Po Huang, Wensen Hung | 2018-05-29 |