Issued Patents All Time
Showing 51–75 of 82 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11251113 | Methods of embedding magnetic structures in substrates | Sai Vadlamani, Prithwish Chatterjee, Rahul Jain, Lauren A. Link, Andrew J. Brown +2 more | 2022-02-15 |
| 11244912 | Semiconductor package having a coaxial first layer interconnect | Sai Vadlamani, Aleksandar Aleksov, Rahul Jain, Kyu Oh Lee, Kristof Darmawikarta +2 more | 2022-02-08 |
| 11233009 | Embedded multi-die interconnect bridge having a molded region with through-mold vias | Praneeth Akkinepally, Frank Truong, Jason M. Gamba | 2022-01-25 |
| 11107781 | RFIC having coaxial interconnect and molded layer | Srinivas V. Pietambaram, Rahul N. Manepalli, Kristof Darmawikarta, Aleksandar Aleksov, Telesphor Kamgaing | 2021-08-31 |
| 11107780 | Pseudo-stripline using double solder-resist structure | Lilia May, Amruthavalli Pallavi Alur, Robert L. Sankman | 2021-08-31 |
| 11101222 | Panel level packaging for multi-die products interconnected with very high density (VHD) interconnect layers | Srinivas V. Pietambaram, Sri Ranga Sai Boyapati, Kristof Darmawikarta, Javier Soto Gonzalez, Kwangmo Chris Lim | 2021-08-24 |
| 11088103 | First layer interconnect first on carrier approach for EMIB patch | Changhua Liu, Xiaoying Guo, Aleksandar Aleksov, Steve Cho, Leonel Arana +1 more | 2021-08-10 |
| 11075130 | Package substrate having polymer-derived ceramic core | Lisa Ying Ying Chen, Lauren A. Link, Amruthavalli Pallavi Alur, Kristof Darmawikarta, Siddharth K. Alur +3 more | 2021-07-27 |
| 11069620 | Die interconnect substrate, an electrical device and a method for forming a die interconnect substrate | Kristof Darmawikarta, Sri Ranga Sai Boyapati | 2021-07-20 |
| 11043457 | Embedded multi-die interconnect bridge packages with lithotgraphically formed bumps and methods of assembling same | Amruthavalli Pallavi Alur, Sri Ranga Sai Boyapati, Islam A. Salama, Robert L. Sankman | 2021-06-22 |
| 11037802 | Package substrate having copper alloy sputter seed layer and high density interconnects | Kristof Darmawikarta, Sri Ranga Sai Boyapati, Sandeep Gaan, Srinivas V. Pietambaram | 2021-06-15 |
| 10978399 | Die interconnect substrate, an electrical device, and a method for forming a die interconnect substrate | Kristof Darmawikarta, Sri Ranga Sai Boyapati, Wei-Lun Kane Jen, Javier Soto Gonzalez | 2021-04-13 |
| 10916486 | Semiconductor device including silane based adhesion promoter and method of making | Andrew J. Brown, Chi-Mon Chen, Amanda E. Schuckman, Wei-Lun Kane Jen | 2021-02-09 |
| 10872872 | Package substrate with high-density interconnect layer having pillar and via connections for fan out scaling | Sri Ranga Sai Boyapati, Kristof Darmawikarta, Srinivas V. Pietambaram, Javier Soto Gonzalez, Kwangmo Chris Lim +1 more | 2020-12-22 |
| 10854541 | Electromigration resistant and profile consistent contact arrays | Srinivas V. Pietambaram, Jung Kyu Han, Ali Lehaf, Steve Cho, Thomas HEATON +3 more | 2020-12-01 |
| 10790233 | Package substrates with integral devices | Kristof Darmawikarta, Sri Ranga Sai Boyapati | 2020-09-29 |
| 10741534 | Multi-die microelectronic device with integral heat spreader | Aleksandar Aleksov, Sri Ranga Sai Boyapati, Kristof Darmawikarta, Rahul N. Manepalli, Srinivas V. Pietambaram | 2020-08-11 |
| 10727185 | Multi-chip package with high density interconnects | Aleksandar Aleksov, Adel A. Elsherbini, Kristof Darmawikarta, Sri Ranga Sai Boyapati | 2020-07-28 |
| 10705293 | Substrate integrated waveguide | Kristof Darmawikarta, Rahul Jain, Sri Ranga Sai Boyapati, Maroun D. Moussallem, Rahul N. Manepalli +1 more | 2020-07-07 |
| 10707168 | Embedded multi-die interconnect bridge packages with lithographically formed bumps and methods of assembling same | Amruthavalli Pallavi Alur, Sri Ranga Sai Boyapati, Islam A. Salama, Robert L. Sankman | 2020-07-07 |
| 10494700 | Method of fabricating a microelectronic substrate | Sri Ranga Sai Boyapati, Amruthavalli Pallavi Alur, Daniel N. Sobieski | 2019-12-03 |
| 10453812 | Polarization defined zero misalignment vias for semiconductor packaging | Hiroki Tanaka, Aleksandar Aleksov, Sri Ranga Sai Boyapati, Kristof Darmawikarta | 2019-10-22 |
| 10431537 | Electromigration resistant and profile consistent contact arrays | Srinivas V. Pietambaram, Jung Kyu Han, Ali Lehaf, Steve Cho, Thomas HEATON +3 more | 2019-10-01 |
| 10403564 | Dual-damascene zero-misalignment-via process for semiconductor packaging | Aleksandar Aleksov, Hiroki Tanaka, Kristof Darmawikarta, Changhua Liu, Chung Kwang Christopher Tan +2 more | 2019-09-03 |
| 10163798 | Embedded multi-die interconnect bridge packages with lithotgraphically formed bumps and methods of assembling same | Amruthavalli Pallavi Alur, Sri Ranga Sai Boyapati, Islam A. Salama, Robert L. Sankman | 2018-12-25 |