Patent Leaderboard
USPTO Patent Rankings Data through Sept 30, 2025
TD

Timothy J. Dalton

IBM: 171 patents #222 of 70,183Top 1%
Infineon Technologies Ag: 9 patents #1,105 of 7,486Top 15%
Globalfoundries: 2 patents #1,397 of 4,424Top 35%
DEDigital Equipment: 1 patents #1,005 of 2,100Top 50%
MIT: 1 patents #4,386 of 9,367Top 50%
Ridgefield, CT: #3 of 574 inventorsTop 1%
Connecticut: #29 of 34,797 inventorsTop 1%
Overall (All Time): #4,520 of 4,157,543Top 1%
175 Patents All Time

Issued Patents All Time

Showing 76–100 of 175 patents

Patent #TitleCo-InventorsDate
7531407 Semiconductor integrated circuit devices having high-Q wafer backside inductors and methods of fabricating same Lawrence A. Clevenger, Louis L. Hsu, Carl Radens, Vidhya Ramachandran, Keith Kwong Hon Wong +1 more 2009-05-12
7528065 Structure and method for MOSFET gate electrode landing pad Lawrence A. Clevenger, Louis C. Hsu, Carl Radens, Kwong Hon Wong, Chih-Chao Yang 2009-05-05
7528048 Planar vertical resistor and bond pad resistor and related method Douglas D. Coolbaugh, Daniel C. Edelstein, Ebenezer E. Eshun, Jeffrey P. Gambino, Kevin S. Petrarca +2 more 2009-05-05
7528493 Interconnect structure and method of fabrication of same Chih-Chao Yang, Lawrence A. Clevenger, Andrew P. Cowley, Meeyoung H. Yoon 2009-05-05
7526698 Error detection and correction in semiconductor structures Marc R. Faucher, Paul D. Kartschoke, Peter A. Sandon 2009-04-28
7514271 Method of forming high density planar magnetic domain wall memory Michael C. Gaidis, Lawrence A. Clevenger, John K. DeBrosse, Louis L. Hsu, Carl Radens +2 more 2009-04-07
7504727 Semiconductor interconnect structure utilizing a porous dielectric material as an etch stop layer between adjacent non-porous dielectric materials Nicholas C. M. Fuller 2009-03-17
7497959 Methods and structures for protecting one area while processing another area on a chip Deok-kee Kim, Kenneth T. Settlemyer, Jr., Kangguo Cheng, Ramachandra Divakaruni, Carl Radens +4 more 2009-03-03
7494915 Back end interconnect with a shaped interface Lawrence A. Clevenger, Andrew P. Cowley, Mark Hoinkis, Steffen K. Kaldor, Erdem Kaltalioglu +8 more 2009-02-24
7488677 Interconnect structures with encasing cap and methods of making thereof Kwong Hon Wong, Louis C. Hsu, Carol Radens, Chih-Chao Yang, Lawrence A. Clevenger +1 more 2009-02-10
7486845 Waveguide polarization beam splitters and method of fabricating a waveguide wire-grid polarization beam splitter Charles T. Black, Gian-Luca Bona, Nicholas C. M. Fuller, Roland Germann, Maurice McGlashan-Powell +2 more 2009-02-03
7473979 Semiconductor integrated circuit devices having high-Q wafer back-side capacitors Lawrence A. Clevenger, Louis L. Hsu, Carl Radens, Vidhya Ramachandran, Keith Kwong Hon Wong +1 more 2009-01-06
7462509 Dual-sided chip attached modules Kerry Bernstein, Timothy H. Daubenspeck, Jeffrey P. Gambino, Mark D. Jaffe, Christopher D. Muzzy +3 more 2008-12-09
7439151 Method and structure for integrating MIM capacitors within dual damascene processing techniques Douglas D. Coolbaugh, Ebenezer E. Eshun, Vincent J. McGahay, Anthony K. Stamper, Kunal Vaed 2008-10-21
7439174 Multilayer hardmask scheme for damage-free dual damascene processing of SiCOH dielectrics Nicholas C. M. Fuller, Stephen M. Gates 2008-10-21
7435676 Dual damascene process flow enabling minimal ULK film modification and enhanced stack integrity Nicholas C. M. Fuller, Satyanarayana V. Nitta 2008-10-14
7435671 Trilayer resist scheme for gate etching applications Nicholas C. M. Fuller, Ying Zhang 2008-10-14
7427550 Methods of fabricating passive element without planarizing Anil K. Chinthakindi, Ebenezer E. Eshun, Jeffrey P. Gambino, Anthony K. Stamper, Kunal Vaed 2008-09-23
7405147 Device and methodology for reducing effective dielectric constant in semiconductor devices Daniel C. Edelstein, Matthew E. Colburn, Edward C. Cooney, III, John A. Fitzsimmons, Jeffrey P. Gambino +10 more 2008-07-29
7402532 Structure to improve adhesion between top CVD low-k dielectric and dielectric capping layer Lawrence A. Clevenger, Stefanie Chiras, James J. Demarest, Derren N. Dunn, Chester T. Dziobkowski +7 more 2008-07-22
7402463 Adopting feature of buried electrically conductive layer in dielectrics for electrical anti-fuse application Chih-Chao Yang, Lawrence A. Clevenger, Nicholas C. M. Fuller, Louis C. Hsu 2008-07-22
7394110 Planar vertical resistor and bond pad resistor Douglas D. Coolbaugh, Daniel C. Edelstein, Ebenezer E. Eshun, Jeffrey P. Gambino, Kevin S. Petrarca +2 more 2008-07-01
7393776 Method of forming closed air gap interconnects and structures formed thereby Matthew E. Colburn, Elbert E. Huang, Satya V. Nitta, Sampath Purushothaman, Katherine L. Saenger +2 more 2008-07-01
7394145 Methods of fabricating passive element without planarizing and related semiconductor device Anil K. Chinthakindi, Ebenezer E. Eshun, Jeffrey P. Gambino, Anthony K. Stamper, Kunal Vaed 2008-07-01
7394332 Micro-cavity MEMS device and method of fabricating same Louis C. Hsu, Lowrence A. Clevenger, Carl Radens, Keith Kwong Hon Wong, Chih-Chao Yang 2008-07-01