Issued Patents All Time
Showing 176–200 of 351 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9840778 | Plasma chamber having an upper electrode having controllable valves and a method of using the same | Yen-Shuo Su, Ying Xiao | 2017-12-12 |
| 9818603 | Semiconductor devices and methods of manufacture thereof | Wei-Chi Lin, Neng-Kuo Chen, Sey-Ping Sun | 2017-11-14 |
| 9810990 | Chemical treatment for lithography improvement in a negative tone development process | Wei-Han Lai, Ching-Yu Chang, Cheng-Han Wu, Siao-Shan Wang | 2017-11-07 |
| 9805913 | Ion beam dimension control for ion implantation process and apparatus, and advanced process control | Chih-Hong Hwang, Chun-Lin Chang, Nai-Han Cheng, Chi-Ming Yang | 2017-10-31 |
| 9786471 | Plasma etcher design with effective no-damage in-situ ash | Ying Xiao | 2017-10-10 |
| 9776216 | Dispensing apparatus and dispensing method | Weibo Yu, Kuo-Sheng Chuang, Wen-Yu Ku | 2017-10-03 |
| 9764364 | Apparatus and methods for movable megasonic wafer probe | Ying-Hsueh Chang Chien, Chi-Ming Yang, Ming-Hsi Yeh, Shao-Yen Ku | 2017-09-19 |
| 9735276 | Non-planar transistors and methods of fabrication thereof | Chih-Hang Tung, Cheng-Hung Chang, Sey-Ping Sun | 2017-08-15 |
| 9727049 | Qualitative fault detection and classification system for tool condition monitoring and associated methods | Chia-Tong Ho, Po-Feng Tsai, Jung-Chang Chen, Tze-Liang Lee, Jo Fei Wang +1 more | 2017-08-08 |
| 9709904 | Lithography apparatus having dual reticle edge masking assemblies and method of use | Tung-Li Wu, Heng-Hsin Liu, Jui-Chun Peng | 2017-07-18 |
| 9698065 | Real-time calibration for wafer processing chamber lamp modules | Chih-Tien Chang, Sunny Wu, Jo Fei Wang, Jong-I Mou | 2017-07-04 |
| 9684236 | Method of patterning a film layer | Ken-Hsien Hsieh, Kuan-Hsin Lo, Shih-Ming Chang, Wei-Liang Lin, Joy Cheng +5 more | 2017-06-20 |
| 9671685 | Lithographic plane check for mask processing | Heng-Jen Lee, I-Hsiung Huang, Chih-Chiang Tu, Chun-Jen Chen, Rick Lai | 2017-06-06 |
| 9640487 | Wafer alignment mark scheme | Wei-Hsiang Tseng, Chao-Hsiung Wang, Heng-Hsin Liu, Ho-Ping Chen, Jui-Chun Peng | 2017-05-02 |
| 9601587 | Semiconductor device having elevated structure | Sey-Ping Sun, Tsung-Lin Lee, Chih-Hao Chang, Chen-Nan Yeh, Chao-An Jong | 2017-03-21 |
| 9601324 | Method of making wafer assembly | I-Hsiung Huang, Heng-Hsin Liu, Heng-Jen Lee | 2017-03-21 |
| 9589838 | Contact structure of semiconductor device | Sung-Li Wang, Ding-Kang Shih, Sey-Ping Sun, Clement Hsingjen Wann | 2017-03-07 |
| 9564509 | Method of fabricating an integrated circuit device | Ming-Hsi Yeh, Hsien-Hsin Lin, Ying-Hsueh Chang Chien, Yi-Fang Pai, Chi-Ming Yang | 2017-02-07 |
| 9559182 | Self-aligned dual-metal silicide and germanide formation | Clement Hsingjen Wann, Sey-Ping Sun, Ling-Yen Yeh, Chi-Yuan Shih, Li-Chi Yu +6 more | 2017-01-31 |
| 9519285 | Systems and associated methods for tuning processing tools | Po-Feng Tsai, Chia-Tong Ho, Sunny Wu, Jo Fei Wang, Jong-I Mou | 2016-12-13 |
| 9449889 | Method for monitoring ion implantation | Chun-Lin Chang, Chih-Hong Hwang, Nai-Han Cheng, Chi-Ming Yang | 2016-09-20 |
| 9449864 | Systems and methods for fabricating and orienting semiconductor wafers | Chin-Ming Lin, Wan-Lai Chen, Chia-Hung Huang, Chi-Ming Yang | 2016-09-20 |
| 9425286 | Source/drain stressor having enhanced carrier mobility and method for manufacturing same | Jeff J. Xu, Pang-Yen Tsai | 2016-08-23 |
| 9403254 | Methods for real-time error detection in CMP processing | James Jeng-Jyi Hwang, Bo-I Lee, Chi-Ming Yang | 2016-08-02 |
| 9377503 | Semiconductor test structures | An-Chun Tu, Chen-Ming Huang, Chih-Jen Wu | 2016-06-28 |