Issued Patents All Time
Showing 1–25 of 33 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12389671 | Source/drain regions of semiconductor devices and methods of forming the same | Wei Hao Lu, Cheng-Wen Cheng, Li-Li Su, Chien-I Kuo | 2025-08-12 |
| 12205849 | Semiconductor device structure with source/drain structure and method for forming the same | Ta-Chun Lin, Hou-Ju Li, Chun-Jun Lin, Kuo-Hua Pan, Jhon Jhy Liaw | 2025-01-21 |
| 12094778 | Fin field-effect transistor device and method of forming | Jeng-Wei Yu, Pei-Ren Jeng, Chii-Horng Li, Yee-Chia Yeo | 2024-09-17 |
| 12068395 | Method for forming an undoped region under a source/drain | Meng-Ku Chen, Ji-Yin Tsai, Jeng-Wei Yu, Pei-Ren Jeng, Yee-Chia Yeo +1 more | 2024-08-20 |
| 12057450 | Epitaxy regions with large landing areas for contact plugs | Jung-Chi Tai, Tsz-Mei Kwok, Tsung-Hsi Yang, Jeng-Wei Yu, Cheng-Hsiung Yen +5 more | 2024-08-06 |
| 11923200 | Integrated circuits having source/drain structure and method of making | Shih-Hsien Huang, Chien-Chang Su | 2024-03-05 |
| 11804487 | Source/drain regions of semiconductor devices and methods of forming the same | Wei Hao Lu, Cheng-Wen Cheng, Li-Li Su, Chien-I Kuo | 2023-10-31 |
| 11652105 | Epitaxy regions with large landing areas for contact plugs | Jung-Chi Tai, Tsz-Mei Kwok, Tsung-Hsi Yang, Jeng-Wei Yu, Cheng-Hsiung Yen +5 more | 2023-05-16 |
| 11581425 | Method for manufacturing semiconductor structure with enlarged volumes of source-drain regions | Tsung-Hsi Yang, Che-Yu Lin, Pei-Ren Jeng, Chii-Horng Li, Yee-Chia Yeo | 2023-02-14 |
| 11373867 | Integrated circuits having source/drain structure and method of making | Shih-Hsien Huang, Chien-Chang Su | 2022-06-28 |
| 11296080 | Source/drain regions of semiconductor devices and methods of forming the same | Wei Hao Lu, Cheng-Wen Cheng, Li-Li Su, Chien-I Kuo | 2022-04-05 |
| 10861935 | Semiconductor device source/drain region with arsenic-containing barrier region | Chien-I Kuo, Shao-Fu Fu, Chia-Ling Chan, Li-Li Su, Wei Hao Lu +2 more | 2020-12-08 |
| 10734517 | Integrated circuits having source/drain structure | Shih-Hsien Huang, Chien-Chang Su | 2020-08-04 |
| 10374038 | Semiconductor device source/drain region with arsenic-containing barrier region | Chien-I Kuo, Chii-Horng Li, Chia-Ling Chan, Li-Li Su, Wei Te Chiang +2 more | 2019-08-06 |
| 10340190 | Semiconductor device structure and method for forming the same | Wei Hao Lu, Tuoh Bin Ng, Li-Li Su, Chii-Horng Li | 2019-07-02 |
| 10134896 | Cyclic deposition etch chemical vapor deposition epitaxy to reduce EPI abnormality | Chun Hsiung Tsai, Sheng-Wen Yu, Ying-Min Chou | 2018-11-20 |
| 9997631 | Methods for reducing contact resistance in semiconductors manufacturing process | Cheng-Yu Yang, Kai-Hsuan Lee, Sheng-Chen Wang, Sai-Hooi Yeong, Yen-Ming Chen | 2018-06-12 |
| 9786780 | Integrated circuits having source/drain structure | Shih-Hsien Huang, Chien-Chang Su | 2017-10-10 |
| 9666691 | Epitaxy profile engineering for FinFETs | Chien-Chang Su, Tsz-Mei Kwok, Hsien-Hsin Lin, Hsueh-Chang Sung, Kuan-Yu Chen | 2017-05-30 |
| 9647115 | Semiconductor structure with enhanced contact and method of manufacture the same | Yasutoshi Okuno, Cheng-Long Chen, Meng-Chun Chang, Sung-Li Wang, Yusuke Oniki | 2017-05-09 |
| 9564509 | Method of fabricating an integrated circuit device | Ming-Hsi Yeh, Hsien-Hsin Lin, Ying-Hsueh Chang Chien, Chi-Ming Yang, Chin-Hsiang Lin | 2017-02-07 |
| 9537004 | Source/drain formation and structure | Chii-Ming Wu, Chien-Chang Su, Hsien-Hsin Lin | 2017-01-03 |
| 9443847 | Epitaxial formation of source and drain regions | Chun Hsiung Tsai | 2016-09-13 |
| 9412870 | Device with engineered epitaxial region and methods of making same | King-Yuen Wong, Chia-Yu Lu, Chien-Chang Su, Yen-Chun Lin, Da-Wen Lin | 2016-08-09 |
| 9356150 | Method for incorporating impurity element in EPI silicon process | Chien-Chang Su, Hsien-Hsin Lin, Tsz-Mei Kwok, Kuan-Yu Chen, Hsueh-Chang Sung | 2016-05-31 |