TG

Tahir Ghani

IN Intel: 469 patents #7 of 30,777Top 1%
SO Sony: 6 patents #6,793 of 25,231Top 30%
TR Tahoe Research: 4 patents #1 of 215Top 1%
DP Daedalus Prime: 3 patents #3 of 21Top 15%
📍 Portland, OR: #4 of 9,213 inventorsTop 1%
🗺 Oregon: #10 of 28,073 inventorsTop 1%
Overall (All Time): #420 of 4,157,543Top 1%
482
Patents All Time

Issued Patents All Time

Showing 151–175 of 482 patents

Patent #TitleCo-InventorsDate
11631673 Non-planar semiconductor device having doped sub-fin region and method to fabricate same Salman Latif, Chanaka D. Munasinghe 2023-04-18
11621354 Integrated circuit structures having partitioned source or drain contact structures Mauro J. Kobrinsky, Stephanie A. Bojarski, Babita Dhayal, Biswajeet Guha 2023-04-04
11616015 Integrated circuit device with back-side interconnection to deep source/drain semiconductor Patrick Morrow, Mauro J. Kobrinsky, Mark Bohr, Rishabh Mehandru 2023-03-28
11610894 Capacitor separations in dielectric layers Travis W. Lajoie, Abhishek A. Sharma, Van H. Le, Chieh-Jen Ku, Pei-Hua Wang +13 more 2023-03-21
11600524 Self-aligned contacts Mark Bohr, Nadia M. Rahhal-Orabi, Subhash M. Joshi, Joseph M. Steigerwald, Jason W. Klaus +2 more 2023-03-07
11594637 Gate-all-around integrated circuit structures having fin stack isolation Leonard P. GULER, Stephen D. Snyder, Biswajeet Guha, William Hsu, Urusa Alaan +4 more 2023-02-28
11588052 Sub-Fin isolation schemes for gate-all-around transistor devices Biswajeet Guha, William Hsu 2023-02-21
11581420 Contact over active gate structures for advanced integrated circuit structure fabrication Andrew W. Veoh, Atul MADHAVAN, Michael L. Hattendorf, Christopher P. Auth 2023-02-14
11581406 Method of fabricating CMOS FinFETs by selectively etching a strained SiGe layer Stephen M. Cea, Roza Kotlyar, Harold W. Kennel, Anand S. Murthy, Glenn A. Glass +1 more 2023-02-14
11581315 Self-aligned gate edge trigate and finFET devices Szuya S. Liao, Biswajeet Guha, Christopher KENYON, Leonard P. GULER 2023-02-14
11575005 Asymmetrical semiconductor nanowire field-effect transistor Seung Hoon Sung, Dipanjan Basu, Ashish Agrawal, Benjamin Chu-Kung, Siddharth Chouksey +3 more 2023-02-07
11569370 DEPOP using cyclic selective spacer etch Leonard P. GULER, Vivek Thirtha, Shu Zhou, Nitesh Kumar, Biswajeet Guha +4 more 2023-01-31
11563081 Self-aligned gate edge and local interconnect Milton Clair Webb, Mark Bohr, Szuya S. Liao 2023-01-24
11557658 Transistors with high density channel semiconductor over dielectric material Gilbert Dewey, Sean T. Ma, Willy Rachmady, Cheng-Ying Huang, Anand S. Murthy +3 more 2023-01-17
11557676 Device, method and system to provide a stressed channel of a transistor Rishabh Mehandru, Stephen M. Cea, Anand S. Murthy 2023-01-17
11538806 Gate-all-around integrated circuit structures having high mobility Roza Kotlyar, Rishabh Mehandru, Stephen M. Cea, Biswajeet Guha, Dax M. Crum 2022-12-27
11538808 Structures and methods for memory cells Sean T. Ma, Aaron D. Lilak, Abhishek A. Sharma, Van H. Le, Seung Hoon Sung +3 more 2022-12-27
11538905 Nanowire transistors employing carbon-based layers Glenn A. Glass, Anand S. Murthy, Nabil G. Mistkawi, Karthik Jambunathan 2022-12-27
11538937 Fin trim plug structures having an oxidation catalyst layer surrounded by a recessed dielectric material Leonard P. GULER, Nick Lindert, Biswajeet Guha, Swaminathan Sivakumar 2022-12-27
11527656 Contact electrodes for vertical thin-film transistors Van H. Le, Jack T. Kavalieros, Gilbert Dewey, Matthew V. Metz, Miriam Reshotko +4 more 2022-12-13
11527640 Wrap-around contact structures for semiconductor nanowires and nanoribbons Rishabh Mehandru, Stephen M. Cea, Biswajeet Guha 2022-12-13
11527612 Gate-all-around integrated circuit structures having vertically discrete source or drain structures Glenn A. Glass, Anand S. Murthy, Biswajeet Guha, Dax M. Crum, Sean T. Ma +3 more 2022-12-13
11521968 Channel structures with sub-fin dopant diffusion blocking layers Cory Bomberger, Anand S. Murthy, Stephen M. Cea, Biswajeet Guha, Anupama Bowonder 2022-12-06
11522072 Vertical integration scheme and circuit elements architecture for area scaling of semiconductor devices Rishabh Mehandru, Patrick Morrow, Ranjith Kumar, Cory E. Weber, Seiyon Kim +1 more 2022-12-06
11522059 Metallic sealants in transistor arrangements Abhishek A. Sharma, Jack T. Kavalieros, Gilbert Dewey, Van H. Le, Lawrence Wong +1 more 2022-12-06